Abstract: An optical element driving mechanism is provided, including a movable portion, a fixed portion, and a driving assembly. The movable portion is connected to an optical element. The movable portion is movable relative to the fixed portion. The driving assembly drives the movable portion to move relative to the fixed portion.

Abstract: A driving mechanism for moving an optical element is provided, including a fixed part, a movable part, and a driving assembly. The movable part is movably connected to the fixed part, wherein the optical element is disposed on the movable part. The driving assembly is configured to drive the movable part to move relative to the fixed part.

Abstract: The present disclosure provides an exhaust system for discharging from semiconductor manufacturing equipment a hazardous gas. The exhaust system includes: a main exhaust pipe positioned above the semiconductor manufacturing equipment and having a top surface and a bottom surface extending parallel to the top surface; a first branch pipe including an upstream end coupled to a source of a gas mixture and a downstream end connected to the main exhaust pipe through the top surface; a second branch pipe including an upstream end and a downstream end connected to the main exhaust pipe through the bottom surface; and a detector configured to detect presence of the hazardous gas in the second branch pipe.

Abstract: A semiconductor structure includes a first dielectric layer over a first conductive line and a second conductive line, a high resistance layer over a portion of the first dielectric layer, a low-k dielectric layer over the second dielectric layer, a second dielectric layer on the high resistance layer, a first conductive via extending through the low-k dielectric layer and the second dielectric layer, and a second conductive via extending through the low-k dielectric layer and the first dielectric layer to the first conductive line. The first conductive via extends into the high resistance layer.

Abstract: An optical element driving mechanism is provided. The optical element driving mechanism includes a fixed portion, a first movable portion, a second movable portion, a first driving assembly, and a second driving assembly. The first movable portion is movable relative to the fixed portion. The second movable portion is used for holding an optical element having a main axis, and is movable relative to the first movable portion. The first driving assembly is used for driving the first movable portion to move in a first dimension relative to the fixed portion, and the second driving assembly is used for driving the second movable portion to move in a second dimension relative to the fixed portion. The first dimension and the second dimension are different.

Abstract: A first and second semiconductor device are bonded together using a bonding contact pad embedded within a bonding dielectric layer of the first semiconductor device and at least one bonding via embedded within a bonding dielectric layer of the second semiconductor device. The bonding contact pad extends a first dimension in a first direction perpendicular to the major surface of the first semiconductor device and a second dimension in a second direction parallel to the plane of the first semiconductor wafer, the second dimension being at least twice the first dimension. The bonding via extends a third dimension in the first direction and a fourth dimension in the second direction, the third dimension being at least twice the first dimension. The bonding contact pad and bonding via may be at least partially embedded in respective bonding dielectric layers in respective topmost dielectric layers of respective stacked interconnect layers.

Abstract: The present invention provides a chip including an I/O pin and an ESD protection circuit. The ESD protection circuit includes a P-type device and a first diode, wherein the P-type device is coupled between the I/O pin and a ground voltage, and an anode of the first diode is directly connected to the I/O pin. In addition, the ESD protection circuit does not comprise any device whose N-type doping/diffusion is directly connected to the I/O pin.

Abstract: A p-GaN high-electron-mobility transistor (HEMT) includes a buffer layer stacked on a substrate, a channel layer stacked on the buffer layer, a supply layer stacked on the channel layer, a doped layer stacked on the supply layer, and a hydrogen barrier layer covering the supply layer and the doped layer. A source and a drain are electrically connected to the channel layer and the supply layer, respectively. A gate is located on the doped layer. The hydrogen barrier layer is doped with fluorine.

Abstract: A wearable device and a method for adjusting a display state based on an environment are provided. The method is adapted for the wearable device. The method includes: capturing an environmental image; when determining that there is a specific object in the environmental image, determining a display mode of a display circuit based on the specific object; and controlling the display circuit to be adjusted to a display state corresponding to the display mode.

Abstract: The present disclosure provides a semiconductor device. The semiconductor device includes a first device and a second device disposed adjacent to the first device; a conductive pillar disposed adjacent to the first device or the second device; a molding surrounding the first device, the second device and the conductive pillar; and a redistribution layer (RDL) over the first device, the second device, the molding and the conductive pillar, wherein the RDL electrically connects the first device to the second device and includes an opening penetrating the RDL and exposing a sensing area over the first device.

Abstract: A hot spot defect detecting method and a hot spot defect detecting system are provided. In the method, hot spots are extracted from a design of a semiconductor product to define a hot spot map comprising hot spot groups, wherein local patterns in a same context of the design yielding a same image content are defined as a same hot spot group. During runtime, defect images obtained by an inspection tool performing hot scans on a wafer manufactured with the design are acquired and the hot spot map is aligned to each defect image to locate the hot spot groups. The hot spot defects in each defect image are detected by dynamically mapping the hot spot groups located in each defect image to a plurality of threshold regions and respectively performing automatic thresholding on pixel values of the hot spots of each hot spot group in the corresponding threshold region.

Abstract: A negative electrode structure applied to an aluminum battery includes a hole material layer and a metal plating layer. The metal plating layer is located on the hole material layer such that the capacity decay rate of the aluminum battery is less than 5% per cycle.

Abstract: A multi-layer cathode coating for positive electrode of a rechargeable electrochemical cell (or secondary cell) (such as a lithium-ion secondary battery) and a secondary battery including a cathode having a multi-layer cathode coating. Multi-layer cathode coatings containing blends of one or more cathode active materials in certain weight ratios thereof.

Abstract: A composite quantum dot includes a quantum dot and a protecting unit. The quantum dot includes a dot body containing a first layer having a composition of M1A1, and a passivating unit containing a passivating metal ion and bound to the dot body. M1 is one of Zn, Sn, Pb, Cd, In, Ga, Ge, Mn, Co, Fe, Al, Mg, Ca, Sr, Ba, Ni, Ag, Ti and Cu, and A1 is one of Se, S, Te, P, As, N, I and O. The protecting unit adsorbs on the quantum dot and includes an amine compound and/or a primary ammonium salt thereof. A method for preparing the composite quantum dot and a method for detecting metal ions in an analyte aqueous solution using the composite quantum dot, as well as a passivated quantum dot and a preparation thereof, are also disclosed.

Abstract: An electrical connection includes a first driving substrate, a first adhesive layer, a first bonding pad a first bonding pad and a second bonding pad. The first driving substrate includes a first substrate and a first dielectric layer on the first substrate. The first adhesive layer is at a sidewall of the first dielectric layer of the first driving substrate. The first bonding pad is on the first substrate of the first driving substrate and in contact with the first adhesive layer, and the first bonding pad includes a plurality of grains, the grains are connected with each other, the grains include [111]-oriented copper grains, and a maximum width of the first bonding pad is equal to or less than 8 microns. The second bonding pad is on the first bonding pad.

Abstract: A semiconductor device and a method of manufacturing the same are provided. The semiconductor device includes a substrate, a plurality of capacitors, and a first supporting layer. The plurality of capacitors are disposed on the substrate. Each of the capacitors extends along a first direction. Each of the plurality of capacitors includes a first capacitor electrode, a second capacitor electrode, and a capacitor dielectric separating the first capacitor electrode from the second capacitor electrode. The first supporting layer is disposed on the substrate. The first supporting layer extends along a second direction different from the first direction. The capacitor dielectric includes a first surface and a second surface which are disposed on two opposite sides along the first direction. The second surface is exposed by the first capacitor electrode. The first supporting layer is disposed between the first surface and the second surface of the capacitor dielectric.

Abstract: A semiconductor device and a method of manufacturing the same are provided. The semiconductor device includes a substrate, a plurality of capacitors, and a first supporting layer. The plurality of capacitors are disposed on the substrate. Each of the capacitors extends along a first direction. Each of the plurality of capacitors includes a first capacitor electrode, a second capacitor electrode, and a capacitor dielectric separating the first capacitor electrode from the second capacitor electrode. The first supporting layer is disposed on the substrate. The first supporting layer extends along a second direction different from the first direction. The capacitor dielectric includes a first surface and a second surface which are disposed on two opposite sides along the first direction. The second surface is exposed by the first capacitor electrode. The first supporting layer is disposed between the first surface and the second surface of the capacitor dielectric.

Abstract: A method for making iridium oxide nanoparticles includes dissolving an iridium salt to obtain a salt-containing solution, mixing a complexing agent with the salt-containing solution to obtain a blend solution, and adding an oxidating agent to the blend solution to obtain a product mixture. A molar ratio of a complexing compound of the complexing agent to the iridium salt is controlled in a predetermined range so as to permit the product mixture to include iridium oxide nanoparticles.

Abstract: A package structure includes a bonding substrate, an integrated circuit, and a heat sink metal. The integrated circuit includes an active region facing the bonding substrate. The heat sink metal is located between the bonding substrate and the active region of the integrated circuit. The heat sink metal is electrically insulated with the integrated circuit.

Abstract: An illumination assembly includes a light source module and a light guide module. The light source module provides first and second beams. The light guide module includes a first light guide triangular prism having a first surface, a second surface and a beam-splitting surface. The first surface is located on a transmission path of the first beam, and the beam-splitting surface is located on a transmission path of the second beam. The first light guide triangular prism includes a first light guide layer arranged on the second surface and a first beam-splitting layer arranged on the beam-splitting surface. The first light guide layer guides the first beam to the first beam-splitting layer. The first beam-splitting layer allows the second beam to pass therethrough and reflect the first beam, so that the first and second beams are emitted from the second surface. A projection device is also provided.