Patents by Inventor Shih-Chi Yang

Shih-Chi Yang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240146205
    Abstract: A flyback power converter includes a power transformer, a first lossless voltage conversion circuit, a first low-dropout linear regulator and a secondary side power supply circuit. The first low-dropout linear regulator (LDO) generates a first operation voltage as power supply for being supplied to a sub-operation circuit. The secondary side power supply circuit includes a second lossless voltage conversion circuit and a second LDO. The second LDO generates a second operation voltage. The first operation voltage and the second operation voltage are shunted to a common node. When a first lossless conversion voltage is greater than a first threshold voltage, the second LDO is enabled to generate the second operation voltage to replace the first operation voltage as power supply supplied to the sub-operation circuit; wherein the second lossless conversion voltage is lower than the first lossless switching voltage.
    Type: Application
    Filed: September 23, 2023
    Publication date: May 2, 2024
    Inventors: Shin-Li Lin, He-Yi Shu, Shih-Jen Yang, Ta-Yung Yang, Yi-Min Shiu, Chih-Ching Lee, Yu-Chieh Hsieh, Chao-Chi Chen
  • Publication number: 20240136313
    Abstract: An electrical connection includes a first driving substrate, a first adhesive layer, a first bonding pad a first bonding pad and a second bonding pad. The first driving substrate includes a first substrate and a first dielectric layer on the first substrate. The first adhesive layer is at a sidewall of the first dielectric layer of the first driving substrate. The first bonding pad is on the first substrate of the first driving substrate and in contact with the first adhesive layer, and the first bonding pad includes a plurality of grains, the grains are connected with each other, the grains include [111]-oriented copper grains, and a maximum width of the first bonding pad is equal to or less than 8 microns. The second bonding pad is on the first bonding pad.
    Type: Application
    Filed: July 6, 2023
    Publication date: April 25, 2024
    Inventors: Chih CHEN, Shih-Chi YANG
  • Publication number: 20240096941
    Abstract: A semiconductor structure includes a substrate with a first surface and a second surface opposite to the first surface, a first and a second shallow trench isolations disposed in the substrate and on the second surface, a deep trench isolation structure in the substrate and coupled to the first shallow trench isolation, a first dielectric layer disposed on the first surface and coupled to the deep trench isolation structure, a second dielectric layer disposed over the first dielectric layer and coupled to the deep trench isolation structure, a third dielectric layer comprising a horizontal portion disposed over the second dielectric layer and a vertical portion coupled to the horizontal portion, and a through substrate via structure penetrating the substrate from the first surface to the second surface and penetrating the second shallow trench isolation.
    Type: Application
    Filed: January 11, 2023
    Publication date: March 21, 2024
    Inventors: SHIH-JUNG TU, PO-WEI LIU, TSUNG-YU YANG, YUN-CHI WU, CHIEN HUNG LIU
  • Publication number: 20200122402
    Abstract: A three dimensional (3D) printing method and a 3D printing apparatus are provided. The 3D printing method includes: performing a voxelization operation on a space including a 3D model to obtain a plurality of voxels corresponding to the space; selecting a first voxel of the voxels including a first supporting point of supporting points; determining a first merge point of a plurality of merge points according to the first voxel, wherein the first merge point is located at a second voxel of the voxels; printing a first supporting member of supporting members according to the first supporting point and the first merge point.
    Type: Application
    Filed: April 12, 2019
    Publication date: April 23, 2020
    Applicants: XYZprinting, Inc., Kinpo Electronics, Inc.
    Inventors: Shih-Chi Yang, Yao-Jen Kuo, Shau-An Tsai
  • Patent number: 9553140
    Abstract: An integrated circuit and a method of fabricating the integrated circuit are provided. In various embodiments, the integrated circuit includes a substrate and a polysilicon resistor. The polysilicon resistor is disposed on the substrate. The polysilicon resistor has at least one positive TCR portion and at least one negative TCR portion. The positive TCR portion is adjacent to the negative TCR portion, and the positive TCR portion is in direct contact with the negative TCR portion.
    Type: Grant
    Filed: March 31, 2016
    Date of Patent: January 24, 2017
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Hung-Sen Wang, Shih-Chi Yang, Kuo-Ching Chang, Wei-Sho Hung, Ho-Chun Liou
  • Publication number: 20160218171
    Abstract: An integrated circuit and a method of fabricating the integrated circuit are provided. In various embodiments, the integrated circuit includes a substrate and a polysilicon resistor. The polysilicon resistor is disposed on the substrate. The polysilicon resistor has at least one positive TCR portion and at least one negative TCR portion. The positive TCR portion is adjacent to the negative TCR portion, and the positive TCR portion is in direct contact with the negative TCR portion.
    Type: Application
    Filed: March 31, 2016
    Publication date: July 28, 2016
    Inventors: Hung-Sen WANG, Shih-Chi YANG, Kuo-Ching CHANG, Wei-Sho HUNG, Ho-Chun LIOU
  • Patent number: 9331136
    Abstract: An integrated circuit and a method of fabricating the integrated circuit are provided. In various embodiments, the integrated circuit includes a substrate and a polysilicon resistor. The polysilicon resistor is disposed on the substrate. The polysilicon resistor has at least one positive TCR portion and at least one negative TCR portion. The positive TCR portion is adjacent to the negative TCR portion, and the positive TCR portion is in direct contact with the negative TCR portion.
    Type: Grant
    Filed: May 30, 2014
    Date of Patent: May 3, 2016
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Hung-Sen Wang, Shih-Chi Yang, Kuo-Ching Chang, Wei-Sho Hung, Ho-Chun Liou
  • Publication number: 20150349045
    Abstract: An integrated circuit and a method of fabricating the integrated circuit are provided. In various embodiments, the integrated circuit includes a substrate and a polysilicon resistor. The polysilicon resistor is disposed on the substrate. The polysilicon resistor has at least one positive TCR portion and at least one negative TCR portion. The positive TCR portion is adjacent to the negative TCR portion, and the positive TCR portion is in direct contact with the negative TCR portion.
    Type: Application
    Filed: May 30, 2014
    Publication date: December 3, 2015
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Hung-Sen WANG, Shih-Chi YANG, Kuo-Ching CHANG, Wei-Sho HUNG, Ho-Chun LIOU
  • Publication number: 20090228200
    Abstract: A handheld electronic device and a navigation method using the same are provided. The handheld electronic device includes a calculating unit and a display unit. The calculating unit generates an indication direction according to first geographic location information, second geographic location information, and a reference direction. The display unit is coupled to the first calculating unit and displays the indication direction and the reference direction simultaneously.
    Type: Application
    Filed: February 25, 2009
    Publication date: September 10, 2009
    Applicant: MSTAR SEMICONDUCTOR, INC.
    Inventor: Shih-Chi Yang
  • Publication number: 20090228208
    Abstract: A navigation device and a navigation method using the same are provided. The navigation device includes a storage unit, a positioning module, a first calculating unit and a display unit. The first calculating unit is coupled to the storage unit, and the display unit is coupled to the first calculating unit. The storage unit stores at least a set of theme information. The positioning module detects longitude and latitude information of a current location so as to generate geographic information. The first calculating unit generates an indication direction according to the geographic information, a reference direction, and the theme information without referencing map data. The display unit displays the indication direction.
    Type: Application
    Filed: February 20, 2009
    Publication date: September 10, 2009
    Applicant: MSTAR SEMICONDUCTOR, INC.
    Inventor: Shih-Chi Yang
  • Patent number: 6265520
    Abstract: Disclosed is a solvent soluble polyimide and a method for making thereof, which characterizes by producing a solvent soluble polyimide with low electric conductivity through the polymerization of an anhydride and a diamine under the condition with or without catalyst.
    Type: Grant
    Filed: November 29, 1999
    Date of Patent: July 24, 2001
    Assignee: Industrial Technology Research Institute
    Inventors: Hui-Lung Kuo, Chein-Dhau Lee, Yi-Chun Liu, Shih-Chi Yang