Patents by Inventor Shih Chuan Huang
Shih Chuan Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11955552Abstract: A semiconductor device structure includes a source/drain feature comprising a first surface, a second surface opposing the first surface, and a sidewall connecting the first surface to the second surface. The structure also includes a dielectric layer having a continuous surface in contact with the entire second surface of the source/drain feature, a semiconductor layer having a first surface, a second surface opposing the first surface, and a sidewall connecting the first surface to the second surface, wherein the sidewall of the semiconductor layer is in contact with the sidewall of the source/drain feature. The structure also includes a gate dielectric layer in contact with the continuous surface of the dielectric layer and the second surface of the semiconductor layer, and a gate electrode layer surrounding a portion of the semiconductor layer.Type: GrantFiled: November 14, 2022Date of Patent: April 9, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Li-Zhen Yu, Huan-Chieh Su, Shih-Chuan Chiu, Lin-Yu Huang, Cheng-Chi Chuang, Chih-Hao Wang
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Patent number: 11949016Abstract: A method of fabricating a device includes providing a fin element in a device region and forming a dummy gate over the fin element. In some embodiments, the method further includes forming a source/drain feature within a source/drain region adjacent to the dummy gate. In some cases, the source/drain feature includes a bottom region and a top region contacting the bottom region at an interface interposing the top and bottom regions. In some embodiments, the method further includes performing a plurality of dopant implants into the source/drain feature. In some examples, the plurality of dopant implants includes implantation of a first dopant within the bottom region and implantation of a second dopant within the top region. In some embodiments, the first dopant has a first graded doping profile within the bottom region, and the second dopant has a second graded doping profile within the top region.Type: GrantFiled: May 13, 2021Date of Patent: April 2, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Shih-Hao Lin, Chih-Chuan Yang, Chih-Hsuan Chen, Bwo-Ning Chen, Cha-Hon Chou, Hsin-Wen Su, Chih-Hsiang Huang
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Publication number: 20230408930Abstract: In a method of tool matching, aberration maps of two or more optical systems of two or more scanner tools are determined. A photoresist pattern is generated by projecting a first layout pattern by an optical system of each one of the two or more scanner tools on a respective substrate. One or more Zernike coefficients of the two or more optical systems are adjusted based on the determined aberration maps of the two or more optical systems to minimize critical dimension (CD) variations in a first region of the photoresist patterns on each respective substrate.Type: ApplicationFiled: June 17, 2022Publication date: December 21, 2023Inventors: Shih-Chuan HUANG, Sheng-Min WANG, Shih-Ming CHANG, Ken-Hsien HSIEH
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Patent number: 10540313Abstract: Example implementations relate to computing devices with movable input/output (I/O) connectors. For example, a computing device may include a chassis of the computing device and an I/O connector to connect an I/O device to the computing device. The I/O connector may be movable about an axis relative to the chassis by at least 180 degrees such that the I/O connector is accessible from multiple sides of the chassis.Type: GrantFiled: December 11, 2015Date of Patent: January 21, 2020Assignee: Hewlett-Packard Development Company, L.P.Inventors: Shih Chuan Huang, Yu Cheng Wu, Chih Sheng Liao, Hsin Wen Hsu, Benjiman White, William E. Hertling, Mike Whitmarsh
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Patent number: 10514737Abstract: A powered device powered by power over Ethernet, PoE, and DC power supply comprises a DC supply circuit, for providing a power required by the powered device, to the powered device via a DC adapter, a PoE circuit, for providing the power to the powered device via a power source equipment, PSE, and a monitoring circuit, connecting with the DC supply circuit and the PoE circuit, for outputting the power to the powered device from the DC supply circuit or the PoE circuit with at least one of a plurality of metal-oxide-semiconductor field-effect transistors, MOSFETs, and bipolar junction transistors, BJTs.Type: GrantFiled: September 25, 2018Date of Patent: December 24, 2019Assignee: Wistron CorporationInventors: Shih-Chuan Huang, I-Ming Chen
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Publication number: 20190250683Abstract: A powered device powered by power over Ethernet, PoE, and DC power supply comprises a DC supply circuit, for providing a power required by the powered device, to the powered device via a DC adapter, a PoE circuit, for providing the power to the powered device via a power source equipment, PSE, and a monitoring circuit, connecting with the DC supply circuit and the PoE circuit, for outputting the power to the powered device from the DC supply circuit or the PoE circuit with at least one of a plurality of metal-oxide-semiconductor field-effect transistors, MOSFETs, and bipolar junction transistors, BJTs.Type: ApplicationFiled: September 25, 2018Publication date: August 15, 2019Inventors: Shih-Chuan Huang, I-Ming Chen
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Publication number: 20180276168Abstract: Example implementations relate to computing devices with movable input/output (I/O) connectors. For example, a computing device may include a chassis of the computing device and an I/O connector to connect an I/O device to the computing device. The I/O connector may be movable about an axis relative to the chassis by at least 180 degrees such that the I/O connector is accessible from multiple sides of the chassis.Type: ApplicationFiled: December 11, 2015Publication date: September 27, 2018Applicant: Hewlett-Packard Development Company, L.P.Inventors: Shih Chuan HUANG, Yu Cheng WU, Chih Sheng LIAO, Hsin Wen HSU, Benjiman WHITE, William E. HERTLING, Mike WHITMARSH
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Patent number: 9614948Abstract: A telephone and an audio control method thereof are provided. The telephone includes a connector, a detecting circuit and an audio control unit. The connector connects an audio transceiver. The detecting circuit couples the connector, and generates a detecting voltage by detecting the audio transceiver through the connector. The audio controlling unit couples the detecting circuit and the connector. The audio control unit includes an analog-to-digital converter, an audio codec and a processing unit. The analog-to-digital converter is configured to covert the detecting voltage into a digital code. The audio codec provides at least two audio configurations. The processing unit identifies the audio transceiver according to the digital code, and controls the audio codec to switch to the audio configuration adapted to the identified audio transceiver to process audio data of the audio transceiver.Type: GrantFiled: March 9, 2015Date of Patent: April 4, 2017Assignee: Wistron CorporationInventors: Shih-Chuan Huang, Hsin-Chun Lee, Chih-Hao Chang
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Publication number: 20160173695Abstract: A telephone and an audio control method thereof are provided. The telephone includes a connector, a detecting circuit and an audio control unit. The connector connects an audio transceiver. The detecting circuit couples the connector, and generates a detecting voltage by detecting the audio transceiver through the connector. The audio controlling unit couples the detecting circuit and the connector. The audio control unit includes an analog-to-digital converter, an audio codec and a processing unit. The analog-to-digital converter is configured to covert the detecting voltage into a digital code. The audio codec provides at least two audio configurations. The processing unit identifies the audio transceiver according to the digital code, and controls the audio codec to switch to the audio configuration adapted to the identified audio transceiver to process audio data of the audio transceiver.Type: ApplicationFiled: March 9, 2015Publication date: June 16, 2016Inventors: Shih-Chuan Huang, Hsin-Chun Lee, Chih-Hao Chang
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Patent number: 8659542Abstract: A driving circuit for driving electronic paper is provided, which includes a plurality of driving units. Each driving unit couples to display units of a row of the electronic paper through a data terminal for driving a display unit from a previous gray level to a target gray level during a driving period. Each driving unit includes a data driver and a switch. The data driver respectively provides a black data DC voltage and a white data DC voltage to the data terminal during a black phase and a white phase of the driving period, and provides a first pulse and a second pulse to the data node during a program phase of the driving period. The switch conducts the data node to a middle voltage between the first pulse and the second pulse.Type: GrantFiled: August 8, 2011Date of Patent: February 25, 2014Assignee: Orise Technology Co., Ltd.Inventors: Cheng-Chin Liu, Shih-Chuan Huang
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Patent number: 8390637Abstract: The present invention relates to a method for frame memory access and a display driver using the same. The method is a data moving method for allowing a display driver integrated circuit built in a portrait style frame memory to be used in a landscape mode. The spirit of the method is to repeatedly read data from the portrait style frame memory to the shift register, and move the data on the shift register to put the data to the correct data latch to constitute complete scan line data. Therefore, the portrait style display driver integrated circuit may drive a landscape mode display panel.Type: GrantFiled: April 16, 2009Date of Patent: March 5, 2013Assignee: Orise Technology Co., Ltd.Inventors: Szu-Mien Wang, Dan-Chi Yang, Shih Chuan Huang
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Publication number: 20120038686Abstract: A driving circuit for driving electronic paper is provided, which includes a plurality of driving units. Each driving unit couples to display units of a row of the electronic paper through a data terminal for driving a display unit from a previous gray level to a target gray level during a driving period. Each driving unit includes a data driver and a switch. The data driver respectively provides a black data DC voltage and a white data DC voltage to the data terminal during a black phase and a white phase of the driving period, and provides a first pulse and a second pulse to the data node during a program phase of the driving period. The switch conducts the data node to a middle voltage between the first pulse and the second pulse.Type: ApplicationFiled: August 8, 2011Publication date: February 16, 2012Applicant: Orise Technology Co., Ltd.Inventors: Cheng-Chin Liu, Shih-Chuan Huang
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Publication number: 20100123730Abstract: The present invention relates to a method for frame memory access and a display driver using the same. The method is a data moving method for allowing a display driver integrated circuit built in a portrait style frame memory to be used in a landscape mode. The spirit of the method is to repeatedly read data from the portrait style frame memory to the shift register, and move the data on the shift register to put the data to the correct data latch to constitute complete scan line data. Therefore, the portrait style display driver integrated circuit may drive a landscape mode display panel.Type: ApplicationFiled: April 16, 2009Publication date: May 20, 2010Inventors: Szu-Mien WANG, Dan-Chi Yang, Shih Chuan Huang