Patents by Inventor Shih-Hsun Chen

Shih-Hsun Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11984419
    Abstract: Package structures and methods for manufacturing the same are provided. The package structure includes a first bump structure formed over a first substrate. The first bump structure includes a first pillar layer formed over the first substrate and a first barrier layer formed over the first pillar layer. In addition, the first barrier layer has a first protruding portion laterally extending outside a first edge of the first pillar layer. The package structure further includes a second bump structure bonded to the first bump structure through a solder joint. In addition, the second bump structure includes a second pillar layer formed over a second substrate and a second barrier layer formed over the second pillar layer. The first protruding portion of the first barrier layer is spaced apart from the solder joint.
    Type: Grant
    Filed: July 26, 2022
    Date of Patent: May 14, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Cheng-Hung Chen, Yu-Nu Hsu, Chun-Chen Liu, Heng-Chi Huang, Chien-Chen Li, Shih-Yen Chen, Cheng-Nan Hsieh, Kuo-Chio Liu, Chen-Shien Chen, Chin-Yu Ku, Te-Hsun Pang, Yuan-Feng Wu, Sen-Chi Chiang
  • Publication number: 20240136383
    Abstract: A semiconductor device includes a single-layered dielectric layer, a conductive line, a conductive via and a conductive pad. The conductive line and the conductive via are disposed in the single-layered dielectric layer. The conductive pad is extended into the single-layered dielectric layer to electrically connected to the conductive line.
    Type: Application
    Filed: January 3, 2024
    Publication date: April 25, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yu-Chien Ku, Huai-Jen Tung, Keng-Ying Liao, Yi-Hung Chen, Shih-Hsun Hsu, Yi-Fang Yang
  • Publication number: 20240124591
    Abstract: Antibodies that specifically bind to CD47 and antibodies that specifically bind to PD-L1 are provided, as well as CD47/PD-L1 bispecific antibodies. Also provided are uses of these antibodies, and related compositions and methods.
    Type: Application
    Filed: May 18, 2023
    Publication date: April 18, 2024
    Applicant: Pfizer Inc.
    Inventors: Javier Fernando CHAPARRO RIGGERS, Shih-Hsun CHEN, Sheng DING, Pawel Kamil DOMINIK, Shahram SALEK-ARDAKANI, Jessica Lynn Stanfield, Thomas John VAN BLARCOM
  • Patent number: 11955501
    Abstract: The present disclosure describes a method for the formation of mirror micro-structures on radiation-sensing regions of image sensor devices. The method includes forming an opening within a front side surface of a substrate; forming a conformal implant layer on bottom and sidewall surfaces of the opening; growing a first epitaxial layer on the bottom and the sidewall surfaces of the opening; depositing a second epitaxial layer on the first epitaxial layer to fill the opening, where the second epitaxial layer forms a radiation-sensing region. The method further includes depositing a stack on exposed surfaces of the second epitaxial layer, where the stack includes alternating pairs of a high-refractive index material layer and a low-refractive index material layer.
    Type: Grant
    Filed: June 6, 2022
    Date of Patent: April 9, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Shih-Yu Liao, Tsai-Hao Hung, Ying-Hsun Chen
  • Patent number: 11948800
    Abstract: A device includes a pair of gate spacers on a substrate, and a gate structure on the substrate and between the gate spacers. The gate structure includes an interfacial layer, a metal oxide layer, a nitride-containing layer, a tungsten-containing layer, and a metal compound layer. The interfacial layer is over the substrate. The metal oxide layer is over the interfacial layer. The nitride-containing layer is over the metal oxide layer. The tungsten-containing layer is over the nitride-containing layer. The metal compound layer is over the tungsten-containing layer. The metal compound layer has a different material than a material of the tungsten-containing layer.
    Type: Grant
    Filed: December 14, 2022
    Date of Patent: April 2, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Yen-Yu Chen, Yu-Chi Lu, Chih-Pin Tsao, Shih-Hsun Chang
  • Publication number: 20240105805
    Abstract: Semiconductor structures and methods for manufacturing the same are provided. The semiconductor structure includes channel structures vertically stacked over a substrate and a source/drain structure laterally attached to the channel structures in the first direction. The semiconductor structure also includes a dielectric wall structure laterally attached to the channel structures in the second direction. The second direction is different from the first direction. In addition, the dielectric wall structure includes a bottom portion and a cap layer formed over the bottom portion. The semiconductor structure also includes an isolation feature vertically overlapping the cap layer of the dielectric wall structure and a gate structure formed around the channel structures and covering a sidewall of the isolation feature.
    Type: Application
    Filed: February 2, 2023
    Publication date: March 28, 2024
    Inventors: Chun-Sheng LIANG, Hong-Chih CHEN, Ta-Chun LIN, Shih-Hsun CHANG, Chih-Hao CHANG
  • Publication number: 20240088148
    Abstract: A semiconductor device includes a substrate, a stack of semiconductor nanosheets, a dielectric wall, and a gate structure. The substrate includes a nanosheet mesa, and the stack of semiconductor nanosheets is disposed on the nanosheet mesa. The dielectric wall crosses through the nanosheet mesa and the stack of semiconductor nanosheets. The gate structure wraps the stack of semiconductor nanosheets and crosses over the dielectric wall, wherein a top of the dielectric wall has a recess.
    Type: Application
    Filed: January 11, 2023
    Publication date: March 14, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yi-Ren Chen, Chung-Ting Li, Shih-Hsun Chang
  • Publication number: 20240077804
    Abstract: A method includes forming a test pattern and a reference pattern in an absorption layer of a photomask structure. The test pattern has a first trench and a second trench, the reference pattern has a third trench and a fourth trench, the test pattern and the reference pattern have substantially the same dimension in a top view, and the second trench is deeper than the first trench, the third trench, and the fourth trench. The method further includes emitting a light beam to the test pattern to obtain a first interference pattern reflected from the test pattern, emitting the light beam to the reference pattern to obtain a second interference pattern reflected from the reference pattern; and comparing the first interference pattern with the second interference pattern to obtain a measured complex refractive index of the absorption layer.
    Type: Application
    Filed: September 1, 2022
    Publication date: March 7, 2024
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Ping-Hsun LIN, Chien-Cheng CHEN, Shih Ju HUANG, Pei-Cheng HSU, Ta-Cheng LIEN, Hsin-Chang LEE
  • Patent number: 11922710
    Abstract: A character recognition method includes the following operations: determining that the image of character to be identified corresponds to a matching character of several registered characters according to several vector distances to be identified between a vector of an image of character to be identified and several vectors of several registered character images of several registered characters, and storing a matching vector distance between the vector of the image of character to be identified and a vector of the matching character by a processor; and storing a data of the matching character according to the image of character to be identified when the matching vector distance is less than a vector distance threshold by the processor.
    Type: Grant
    Filed: April 18, 2022
    Date of Patent: March 5, 2024
    Assignee: Realtek Semiconductor Corporation
    Inventors: Chien-Hao Chen, Chao-Hsun Yang, Shih-Tse Chen
  • Patent number: 11858879
    Abstract: Provided herein are, inter alia, compounds inhibiting poly(ADP-ribose) Glycohydrolase (PARG) in a cancer cell and methods of treating cancer using compounds of the invention.
    Type: Grant
    Filed: June 22, 2018
    Date of Patent: January 2, 2024
    Assignee: CITY OF HOPE
    Inventors: Xiaochun Yu, Shih-Hsun Chen, Yate-Ching Yuan, Hongzhi Li, David Horne
  • Patent number: 11702474
    Abstract: Antibodies that specifically bind to CD47 and antibodies that specifically bind to PD-L1 are provided, as well as CD47/PD-L1 bispecific antibodies. Also provided are uses of these antibodies, and related compositions and methods.
    Type: Grant
    Filed: December 14, 2020
    Date of Patent: July 18, 2023
    Assignee: Pfizer Inc.
    Inventors: Javier Fernando Chaparro Riggers, Shih-Hsun Chen, Sheng Ding, Pawel Kamil Dominik, Shahram Salek-Ardakani, Jessica Lynn Stanfield, Thomas John Van Blarcom
  • Publication number: 20230117438
    Abstract: An intelligent expanding similar word model system and a method thereof are provided. The system is operated in a database system host and includes: a character analysis unit, configured to combine a plurality of key word acoustic models with an interference sound key word test set into a key word forward test module; a candidate word generation unit, configured to generate a plurality of candidate word temporary acoustic models; a recognition rate processing unit, configured to generate a first candidate word acoustic model; a false waking-up rate processing unit, configured to generate a second candidate word acoustic model; and an adjustment unit, configured to combine the plurality of key word acoustic models with the second candidate word acoustic model into a similar word acoustic model.
    Type: Application
    Filed: October 14, 2022
    Publication date: April 20, 2023
    Inventors: Chin-Jung LIU, Shih-Hsun CHEN, Chih-Lung LIN
  • Publication number: 20220370606
    Abstract: The present disclosure describes combination therapies and uses thereof for the treatment of cancer. The combinations therapies include at least a first therapeutic agent and a second therapeutic agent.
    Type: Application
    Filed: December 18, 2019
    Publication date: November 24, 2022
    Applicant: Pfizer Inc.
    Inventors: Shih-Hsun CHEN, Luca MICCI, Cecilia Marianne ODERUP, Shahram SALEK-ARDAKANI, Jie WEI
  • Publication number: 20220002231
    Abstract: Provided herein are, inter alia, compounds inhibiting poly(ADP-ribose) Glycohydrolase (PARG) in a cancer cell and methods of treating cancer using compounds of the invention.
    Type: Application
    Filed: June 22, 2018
    Publication date: January 6, 2022
    Inventors: Xiaochun Yu, Shih-Hsun Chen, Yate-Ching Yuan, Hongzhi LI, David Horne
  • Publication number: 20210355103
    Abstract: Provided herein are, inter alia, methods of treating cancer using compounds of the invention.
    Type: Application
    Filed: July 25, 2019
    Publication date: November 18, 2021
    Inventors: Xiaochun Yu, Shih-Hsun Chen, David Horne, Jun Xie
  • Publication number: 20210179716
    Abstract: Antibodies that specifically bind to CD47 and antibodies that specifically bind to PD-L1 are provided, as well as CD47/PD-L1 bispecific antibodies. Also provided are uses of these antibodies, and related compositions and methods.
    Type: Application
    Filed: December 14, 2020
    Publication date: June 17, 2021
    Applicant: Pfizer Inc.
    Inventors: Javier Fernando CHAPARRO RIGGERS, Shih-Hsun CHEN, Sheng DING, Pawel Kamil DOMINIK, Shahram SALEK-ARDAKANI, Jessica Lynn Stanfield, Thomas John VAN BLARCOM
  • Publication number: 20200149146
    Abstract: A manufacturing method of a high entropy alloy (HEA) coating is provided. The manufacturing method of the HEA coating includes: melting a HEA material, wherein the HEA material comprises at least four metal elements, and the at least four elements are contained in the HEA material with substantially the same content; performing a gas atomization process on the molten HEA material to form HEA powders; and performing a plasma spray process to heat the HEA powders, and spray the heated HEA powders onto a target substrate.
    Type: Application
    Filed: January 22, 2019
    Publication date: May 14, 2020
    Applicant: National Taiwan University of Science and Technology
    Inventors: Shih-Hsun Chen, Kuei-Chung Cheng
  • Patent number: 8469274
    Abstract: A method for fast locating a decipherable pattern in an input image, which is characterized in utilizing an overly downscaled binary image to not only reduce computation time but also facilitate extraction of skeletons for fast and accurately locating pattern, is disclosed. First, a pre-process is applied to an input image to acquire a binary image downscaled n times, from which at least one skeleton corresponding to a decipherable pattern is extracted. Coordinate values of at least one pixel of each skeleton are respectively enlarged n1/2 times and used as the central points on the original image plane for establishing a plurality of detecting blocks with the identical size. Subsequently, a grading mechanism is employed to determine the corresponding detecting blocks of the decipherable pattern.
    Type: Grant
    Filed: October 23, 2009
    Date of Patent: June 25, 2013
    Assignees: Armorlink SH Corp., ICP Electronics, Inc.
    Inventors: Chun-Shun Tseng, Ya-Yun Jheng, Ming-Chi Jhuang, Shih-Hsun Chen, Hai-Peng Cheng, Te-Heng Hsiang, Jung-Hua Wang
  • Publication number: 20100163632
    Abstract: A method for fast locating a decipherable pattern in an input image, which is characterized in utilizing an overly downscaled binary image to not only reduce computation time but also facilitate extraction of skeletons for fast and accurately locating pattern, is disclosed. First, a pre-process is applied to an input image to acquire a binary image downscaled n times, from which at least one skeleton corresponding to a decipherable pattern is extracted. Coordinate values of at least one pixel of each skeleton are respectively enlarged n1/2 times and used as the central points on the original image plane for establishing a plurality of detecting blocks with the identical size. Subsequently, a grading mechanism is employed to determine the corresponding detecting blocks of the decipherable pattern.
    Type: Application
    Filed: October 23, 2009
    Publication date: July 1, 2010
    Inventors: Chun-Shun Tseng, Ya-Yun Jheng, Ming-Chi Jhuang, Shih-Hsun Chen, Hai-Peng Cheng, Te-Heng Hsiang, Jung-Hua Wang
  • Patent number: 7147534
    Abstract: A patterned carbon nanotube process adopted for an electronic device is described. A negative photoresist layer is coated on a cathode substrate. A mask layer is formed with a carved cavity therein during a development process. A carbon nanotube spray is sprayed thereon to fill the carved cavity with a plurality of carbon nanotubes. The cathode substrate is sintered at a high temperature or in a vacuum to remove the mask layer and part of the carbon nanotubes adhered to the mask layer simultaneously, and to connect the rest of the carbon nanotubes firmly to the cathode conductive layer as an electron emitter layer with high resolution for increasing current density and uniformity of illumination of the electronic device.
    Type: Grant
    Filed: June 4, 2004
    Date of Patent: December 12, 2006
    Assignee: Teco Nanotech Co., Ltd.
    Inventors: Shih-Hsun Chen, Chun-Yen Hsiao, Shih-Chien Hsiao, Shie-Heng Lee, Kuei-Wen Cheng