Abstract: A method of programming/reading a multi-bit per cell non-volatile memory with a sequence is disclosed. A plurality of less-significant-bit pages are programmed, and a plurality of consecutive most-significant-bit pages of a plurality of consecutive word lines are programmed one after the other in a consecutive order. The most-significant-bit pages through all word lines in at least one memory block of the non-volatile memory are programmed or read after the less-significant-bit pages through all the word lines in the at least one memory block are programmed or read.

Abstract: A method of programming/reading a multi-bit per cell non-volatile memory with a sequence is disclosed. A plurality of less-significant-bit pages are programmed, and a plurality of consecutive most-significant-bit pages of a plurality of consecutive word lines are programmed one after the other in a consecutive order. The most-significant-bit pages through all word lines in at least one memory block of the non-volatile memory are programmed or read after the less-significant-bit pages through all the word lines in the at least one memory block are programmed or read.

Abstract: A method of twice programming a multi-bit per cell non-volatile memory with a sequence is disclosed. At least one page at a given word line is firstly programmed with program data by a controller of the non-volatile memory, and at least one page at a word line preceding the given word line is secondly programmed with the same program data by the controller.

Abstract: A data transmitting method for communicating one of a plurality of portable devices with a host computer via a data transmitting device having a plurality of USB connector is disclosed. In one embodiment of the present invention, the method includes the following steps: firstly, a switch circuit is configured in one of the portable devices. Then, the portable device having the switch circuit is coupled with the data transmitting device. Afterward, a data transmission path between the host computer and the portable device having the switch circuit is connected by the switch circuit to transmit data between the portable device having the switch circuit and the host computer, or the data transmission path between the USB connector, which is not connecting with the portable device having the switch circuit, and the host computer is connected by the switch circuit.

Abstract: A method and system for adaptively finding reference voltages for reading data from a multi-level cell (MLC) flash memory is disclosed. According to one embodiment, a first total number of cells of the flash memory above a first threshold voltage in a shifted threshold voltage distribution is provided. Search to find a second threshold voltage such that a second total number of the cells above the second threshold voltage is approximate to the first total number. An initial reference voltage or voltages of the initial threshold voltage distribution are shifted with an amount approximate to a voltage difference between the second threshold voltage and the first threshold voltage, thereby resulting in a new reference voltage or voltages for reading the data from the MLC flash memory.

Abstract: A method of reducing coupling effect in a flash memory is disclosed. A neighboring page is read, and a flag is set active if the neighboring page is an interfering page. Data are read from the neighboring page at least two more times using at least two distinct read voltages respectively. The threshold-voltage distributions associated with an original page and the neighboring page are transferred according to the read data and the flag.

Abstract: A uniform coding system for a flash memory is disclosed. A statistic decision unit determines a coding word according to a plurality of inputs. An inverse unit controllably inverts input data to be encoded. The input data are then encoded into encoded data according to a statistic determined by the statistic decision unit.

Abstract: A method and system of finding a read voltage for a flash memory is disclosed. Data are read from array cells of the flash memory with a default read voltage, and a recorded state bit number that is recorded during programming is also read. Determine an optimal read voltage if the readout data do not pass the error correction control (ECC). Data are then re-read from the array cells of the flash memory with the determined optimal read voltage.

Abstract: A uniform coding system for a flash memory is disclosed. A statistic decision unit determines a coding word according to a plurality of inputs. An inverse unit controllably inverts input data to be encoded. The input data are then encoded into encoded data according to a statistic determined by the statistic decision unit.

Abstract: A method and system for obtaining a reference block on which reference voltages may be found for a MLC flash memory are disclosed. A first block and a second block are provided in the flash memory. A memory controller alternatively controls one of the first and the second blocks to act as the reference block and the other one as a cycle block in a respective period, during which the reference block stays idle and the cycle block is subjected to program/erase cycles.

Abstract: A method and system of finding a read voltage for a flash memory is disclosed. Data are read from array cells of the flash memory with a default read voltage, and a recorded state bit number that is recorded during programming is also read. Determine an optimal read voltage if the readout data do not pass the error correction control (ECC). Data are then re-read from the array cells of the flash memory with the determined optimal read voltage.

Abstract: A method and system for adaptively finding reference voltages for reading data from a multi-level cell (MLC) flash memory is disclosed. According to one embodiment, a first total number of cells of the flash memory above a first threshold voltage in a shifted threshold voltage distribution is provided. Search to find a second threshold voltage such that a second total number of the cells above the second threshold voltage is approximate to the first total number. An initial reference voltage or voltages of the initial threshold voltage distribution are shifted with an amount approximate to a voltage difference between the second threshold voltage and the first threshold voltage, thereby resulting in a new reference voltage or voltages for reading the data from the MLC flash memory.

Abstract: A method of reducing coupling effect in a flash memory is disclosed. A neighboring page is read, and a flag is set active if the neighboring page is an interfering page. Data are read from the neighboring page at least two more times using at least two distinct read voltages respectively. The threshold-voltage distributions associated with an original page and the neighboring page are transferred according to the read data and the flag.

Abstract: A method and system for obtaining a reference block on which reference voltages may be found for a MLC flash memory are disclosed. A first block and a second block are provided in the flash memory. A memory controller alternatively controls one of the first and the second blocks to act as the reference block and the other one as a cycle block in a respective period, during which the reference block stays idle and the cycle block is subjected to program/erase cycles.

Abstract: A method and system for adaptively finding reference voltages for reading data from a multi-level cell (MLC) flash memory is disclosed. According to one embodiment, information about an initial threshold voltage distribution is firstly provided. A first threshold voltage in the initial threshold voltage distribution is then associated with a second threshold voltage in a shifted threshold voltage distribution to be determined, such that the information corresponding to the first threshold voltage is approximate to the information corresponding to the second threshold voltage. Accordingly, initial reference voltage or voltages of the initial threshold voltage distribution are shifted with an amount approximate to difference between the first threshold voltage and the second threshold voltage, thereby resulting in new reference voltage or voltages for reading the data from the MLC flash memory.

Abstract: A method and system for adaptively finding reference voltages for reading data from a multi-level cell (MLC) flash memory is disclosed. According to one embodiment, information about an initial threshold voltage distribution is firstly provided. A first threshold voltage in the initial threshold voltage distribution is then associated with a second threshold voltage in a shifted threshold voltage distribution to be determined, such that the information corresponding to the first threshold voltage is approximate to the information corresponding to the second threshold voltage. Accordingly, initial reference voltage or voltages of the initial threshold voltage distribution are shifted with an amount approximate to difference between the first threshold voltage and the second threshold voltage, thereby resulting in new reference voltage or voltages for reading the data from the MLC flash memory.

Abstract: A method for forming a shallow trench isolation structure is described. A trench is formed in a substrate, and then a liner layer is formed in the trench. A portion of the liner layer around the top corner of the trench is removed, and then the trench is filled with an insulating material.

Abstract: The present invention relates a method of controlling and monitoring the thickness variation of the film structure of a semiconductor wafer by monitoring the thickness variation of the film structure of a testing region. The method is characterized by etching the film structure of the testing region with a pattern density substantially compatible with that of the device region in order to precisely simulate the thickness variation of the film structure of a device region in a chemical mechanical polishing process.

Abstract: The present invention relates a method of controlling and monitoring the thickness variation of the film structure of a semiconductor wafer by monitoring the thickness variation of the film structure of a testing region. The method is characterized by etching the film structure of the testing region with a pattern density substantially compatible with that of the device region in order to precisely simulate the thickness variation of the film structure of a device region in a chemical mechanical polishing process.

Abstract: The present invention provides a method for fabricating a semiconductor device that can be applied in system on chip (SOC), comprising: providing a substrate with a memory cell region and a peripheral circuit region; forming a plurality of bit-lines in the memory cell region; forming a first and a second dielectric layers respectively in the memory cell region and the peripheral circuit region; and forming a plurality of gates. Next, a blanket ion implantation step is performed to form a plurality of P type LDDs in the substrate besides the gates in a PMOS device region within the peripheral circuit region, without forming an anti-punch through region in the substrate of the memory cell region. Afterwards, a plurality of spacers are formed, connected to one another. An ion implantation step is performed to form a plurality of P type source/drain regions.