Abstract: A process for the fabrication of an MOSFET device includes the formation of a buffer layer (28) overlying the surface of a semiconductor substrate (14) adjacent to a gate electrode (18). A defect compensating species is diffused through the buffer layer (28) and through a gate dielectric layer (12) to form a defect-compensating region (30) at the surface (14) of the semiconductor substrate (10). The defect-compensating region (30) in conjunction with the buffer layer (28) minimize and control the population of point defects in the channel region (22) of the semiconductor substrate (10). By controlling the population of point defects in the channel region (22), a substantially uniform doping profile is maintained in a shallow doped region (16) formed in the semiconductor substrate (10) at the substrate surface (14). The maintenance of a uniform doping profile in the shallow doped region (16) results in improved threshold voltage stability as the lateral dimension of the channel region (22) is reduced.

Abstract: A contact between a heavily-doped region in the substrate and metal is made via a hole in a thick oxide layer and a polysilicon layer. The polysilicon layer is first etched to form a hole for establishing a mask for the eventual contact hole. Prior to forming the contact hole, a sidewall spacer of polysilicon is formed in the hole in the polysilicon layer. A thin oxide layer over the polysilicon layer is used for convenient end point detection during the formation of the polysilicon sidewall spacers. The sidewall spacer reduces the bore dimension of the hole in the polysilicon used for the mask for forming the contact hole. A hole is then etched in the thick oxide which is sloped and which has a bore dimension determined by the hole in the polysilicon which is reduced due to the sidewall spacer. The heavily-doped region, the contact hole, and the remaining polysilicon are coated with a barrier. The contact hole is then filled with a conductive material which also coats the barrier.

Abstract: A contact between a heavily-doped region in the substrate and metal is made via a hole in a thick oxide layer and a polysilicon layer. The polysilicon layer is first etched to form a hole for establishing a mask for the eventual contact hole. Prior to forming the contact hole, a sidewall spacer of polysilicon is formed in the hole in the polysilicon layer. A thin oxide layer over the polysilicon layer is used for convenient end point detection during the formation of the polysilicon sidewall spacers. The sidewall spacer reduces the bore dimension of the hole in the polysilicon used for the mask for forming the contact hole. A hole is then etched in the thick oxide which is sloped and which has a bore dimension determined by the hole in the polysilicon which is reduced due to the sidewall spacer. The heavily-doped region, the contact hole, and the remaining polysilicon are coated with a barrier. The contact hole is then filled with a conductive material which also coats the barrier.

Abstract: A semiconductor device, device metallization, and method are described. The device metallization, which is especially designed for submicron contact openings, includes titanium silicide to provide a low resistance contact to a device region, titanium nitride and sputtered tungsten to provide a diffusion barrier, etched back chemical vapor deposited tungsten for planarization, and aluminum or an aluminum alloy for interconnection.

Abstract: A semiconductor device, device metallization, and method are described. The device metallization, which is especially designed for submicron contact openings, includes titanium silicide to provide a low resistance contact to a device region, titanium nitride and sputtered tungsten to provide a diffusion barrier, etched back chemical vapor deposited tungsten for planarization, and aluminum or an aluminum alloy for interconnection.