Abstract: A method of fabricating a semiconductor structure includes selective use of a cladding layer during the fabrication process to provide critical dimension uniformity. The cladding layer can be formed before forming a recess in an active channel structure or can be formed after filling a recess in an active channel structure with dielectric material. These techniques can be used in semiconductor structures such as gate-all-around (GAA) transistor structures implemented in an integrated circuit.

Abstract: A semiconductor device includes a plurality of semiconductor layers vertically separated from one another. The semiconductor device includes a gate structure that comprises a lower portion and an upper portion, wherein the lower portion wraps around each of the plurality of semiconductor layers. The semiconductor device includes a gate spacer that extends along a sidewall of the upper portion of the gate structure and has a bottom surface. A portion of the bottom surface of the gate spacer and a top surface of a topmost one of the plurality of semiconductor layers form an angle that is less than 90 degrees.

Abstract: A method for forming a semiconductor structure is provided. The method includes forming a spacer layer along a first fin structure and a second fin structure, etching a first portion of the spacer layer and the first fin structure to form first fin spacers and a first recess between the first fin spacers, etching a second portion of the spacer layer and the second fin structure to form second fin spacers and a second recess between the second fin spacers, and forming a first source/drain feature in the first recess and a second source/drain feature in the second recess. The second fin structure is wider than the first fin structure. The first fin spacers have a first height, and the second fin spacers have a second height that is greater than the first height.

Abstract: The present disclosure provides an electronic module including a circuit including a transmitting part and a receiving part physically separated from the transmitting part. The electronic module also includes an element isolated from the circuit and configured to block electrical interference between the transmitting part and the receiving part.

Abstract: A method of forming a semiconductor device includes: forming a fin protruding above a substrate; forming isolation regions on opposing sides of the fin; forming a dummy gate electrode over the fin; removing lower portions of the dummy gate electrode proximate to the isolation regions, where after removing the lower portions, there is a gap between the isolation regions and a lower surface of the dummy gate electrode facing the isolation regions; filling the gap with a gate fill material; after filling the gap, forming gate spacers along sidewalls of the dummy gate electrode and along sidewalls of the gate fill material; and replacing the dummy gate electrode and the gate fill material with a metal

Abstract: The present invention is related to a novel positive electrode active material for lithium-ion battery. The positive electrode active material is expressed by the following formula: Li1.2NixMn0.8-x-yZnyO2, wherein x and y satisfy 0<x?0.8 and 0<y?0.1. In addition, the present invention provides a method of manufacturing the positive electrode active material. The present invention further provides a lithium-ion battery which uses said positive electrode active material.

Abstract: A field effect transistor includes a substrate having a transistor forming region thereon; an insulating layer on the substrate; a first graphene layer on the insulating layer within the transistor forming region; an etch stop layer on the first graphene layer within the transistor forming region; a first inter-layer dielectric layer on the etch stop layer; a gate trench recessed into the first inter-layer dielectric layer and the etch stop layer within the transistor forming region; a second graphene layer on interior surface of the gate trench; a gate dielectric layer on the second graphene layer and on the first inter-layer dielectric layer; and a gate electrode on the gate dielectric layer within the gate trench.

Abstract: An imaging system lens assembly includes a first lens group and a second lens group. The first lens group includes a first catadioptric lens element and a second catadioptric lens element, the second lens group includes at least one lens element. Each of an object-side surface and an image-side surface of the first catadioptric lens element and the second catadioptric lens element includes a central region and a peripheral region. The peripheral region of the object-side surface of the first catadioptric lens element includes a first refracting surface. The peripheral region of the image-side surface of the second catadioptric lens element includes a first reflecting surface. The central region of the object-side surface of the first catadioptric lens element includes a second reflecting surface. The central region of the image-side surface of the second catadioptric lens element includes a last refracting surface.

Abstract: A semiconductor device includes a first stack structure, a second stack structure, and a third stack structure. Each of the stack structure includes semiconductor layers vertically spaced from one another. The first, second, and third stack structures all extend along a first lateral direction. The second stack structure is disposed between the first and third stack structures. The semiconductor device includes a first gate structure that extends along a second lateral direction and wraps around each of the semiconductor layers. The semiconductor layers of the first stack structure are coupled with respective source/drain structures. The semiconductor layers of the second stack structure are coupled with respective source/drain structures. The semiconductor layers of the third stack structure are coupled with a dielectric passivation layer.

Abstract: A catadioptric optical membrane, which is disposed on a surface of a substrate, includes a reflection membrane and a matting membrane. The reflection membrane is disposed on an effective optical path area of the substrate and includes a reflection metal membrane and a reflection oxidation membrane. The reflection oxidation membrane includes a first reflection oxidation membrane and a second reflection oxidation membrane. The reflection metal membrane is farther away from the substrate than the first reflection oxidation membrane. The second reflection oxidation membrane is farther away from the substrate than the reflection metal membrane. The matting membrane is disposed on a non-effective optical path area of the substrate. The matting membrane includes a deep-color membrane and a first anti-reflection membrane. The deep-color membrane includes a deep-color metal membrane and a deep-color oxidation membrane. The deep-color membrane is farther away from the substrate than the first anti-reflection membrane.

Abstract: A method includes etching a semiconductor substrate to form a trench, with the semiconductor substrate having a sidewall facing the trench, and depositing a first semiconductor layer extending into the trench. The first semiconductor layer includes a first bottom portion at a bottom of the trench, and a first sidewall portion on the sidewall of the semiconductor substrate. The first sidewall portion is removed to reveal the sidewall of the semiconductor substrate. The method further includes depositing a second semiconductor layer extending into the trench, with the second semiconductor layer having a second bottom portion over the first bottom portion, and a second sidewall portion contacting the sidewall of the semiconductor substrate. The second sidewall portion is removed to reveal the sidewall of the semiconductor substrate.

Abstract: A semiconductor device includes a substrate. The semiconductor device includes a fin that is formed over the substrate and extends along a first direction. The semiconductor device includes a gate structure that straddles the fin and extends along a second direction perpendicular to the first direction. The semiconductor device includes a first source/drain structure coupled to a first end of the fin along the first direction. The gate structure includes a first portion protruding toward the first source/drain structure along the first direction. A tip edge of the first protruded portion is vertically above a bottom surface of the gate structure.

Abstract: An optical imaging lens includes six lens elements. The object-side surface of the first lens element has a convex part in a vicinity of the periphery of the first lens element, the image-side surface of the second lens element has a concave part in a vicinity of the periphery of the first lens element, the object-side surface of the third lens element has a convex part in a vicinity of the optical axis, the image-side surface of the fourth lens element has a convex part in a vicinity of the periphery of the fourth lens element, the image-side surface of the fifth lens element has a concave part in a vicinity of the optical axis, and the sixth lens element has negative refractive power.

Abstract: An optical imaging lens includes first, second, third, fourth, fifth, and sixth lens elements, disposed sequentially from an object side to an image side, each of the lens elements having an object-side surface facing toward the object side and an image-side surface facing toward the image side. The image-side surface of the first lens element comprises a concave portion in a vicinity of an optical axis. The object-side surface of the third lens element comprises a concave portion in a vicinity of a periphery of the third lens element. The object-side surface of the fourth lens element comprises a concave portion in a vicinity of the optical axis. The lens elements of the optical imaging lens as a whole are only the six lens elements.

Abstract: A method of fabricating a semiconductor device is disclosed. The method includes forming semiconductor fins on a substrate. A first dummy gate is formed over the semiconductor fins. A recess is formed in the first dummy gate, and the recess is disposed between the semiconductor fins. A dummy fin material is formed in the recess. A portion of the dummy fin material is removed to expose an upper surface of the first dummy gate and to form a dummy fin. A second dummy gate is formed on the exposed upper surface of the first dummy gate.

Abstract: An example system can include a noise sensor communicatively coupled to a controller of a computing device to dynamically determine a sound pressure level (SPL) of an environment in which the computing device is present. The computing device can include a cooling fan and the controller comprising a processor in communication with a memory resource including instructions executable to dynamically determine a threshold speed of the cooling fan based on the determined SPL of the environment set a speed of the cooling fan based on the determined threshold speed.

Abstract: An image lens assembly includes five lens elements which are, in order from an outer side to an inner side along an optical path: a first lens element, a second lens element, a third lens element, a fourth lens element and a fifth lens element. Each of the five lens elements has an outer-side surface facing toward the outer side and an inner-side surface facing toward the inner side. The outer-side surface of the first lens element is concave in a paraxial region thereof, and the outer-side surface of the first lens element has at least one inflection point.

Abstract: An optical imaging lens comprises first, second, third, fourth, fifth and sixth lens elements arranged sequentially from an object side to an image side along an optical axis. The object-side surface of the second lens element has a concave portion in the vicinity of a periphery of the second lens element, and the image-side surface of the second lens element has a concave portion in a vicinity of the optical axis. The image-side surface of the third lens element has a concave portion in the vicinity of a periphery of the third lens element. An effective focal length of the optical imaging lens is EFL, an air gap between the fourth lens element and the fifth lens element along the optical axis is G45, a central thickness of the sixth lens element along the optical axis is represented by T6, and EFL, G45 and T6 satisfy the equation: EFL/(G45+T6)?6.40.

Abstract: An optical imaging lens includes six lens elements positioned sequentially from an object side to an image side along an optical axis. The image-side surface of the first lens element has a concave portion in a vicinity of the periphery of the first lens element and the object-side surface of the sixth lens element has a convex portion in a vicinity of the periphery of the sixth lens element. Gaa is a sum of all five air gaps from the first lens element to the sixth lens element along the optical axis, T5 is a central thickness of the fifth lens element along the optical axis, and Gaa and T5 satisfy the equation Gaa/T5?3.85.

Abstract: An optical imaging lens includes first, second, third, fourth, fifth, and sixth lens elements, disposed sequentially from an object side to an image side, each of the lens elements having an object-side surface facing toward the object side and an image-side surface facing toward the image side. The image-side surface of the first lens element comprises a concave portion in a vicinity of an optical axis. The object-side surface of the third lens element comprises a concave portion in a vicinity of a periphery of the third lens element. The object-side surface of the fourth lens element comprises a concave portion in a vicinity of the optical axis. The lens elements of the optical imaging lens as a whole are only the six lens elements.