Patents by Inventor Shijian Ge

Shijian Ge has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Selective margin testing to determine whether to signal train a memory system
    Patent number: 11894084
    Abstract: Method, systems and apparatuses may provide for technology that executes a margin test of a first memory storage based on a subset of first signals associated with the first memory storage. The technology determines, based on the margin test, first margin data to indicate whether the first memory storage complies with one or more electrical constraints. The technology determines, based on the first margin data, whether to execute a signal training process.
    Type: Grant
    Filed: February 8, 2019
    Date of Patent: February 6, 2024
    Assignee: Intel Corporation
    Inventors: Dujian Wu, Shijian Ge, Daocheng Bu
  • SELECTIVE MARGIN TESTING TO DETERMINE WHETHER TO SIGNAL TRAIN A MEMORY SYSTEM
    Publication number: 20220093197
    Abstract: Method, systems and apparatuses may provide for technology that executes a margin test of a first memory storage based on a subset of first signals associated with the first memory storage. The technology determines, based on the margin test, first margin data to indicate whether the first memory storage complies with one or more electrical constraints. The technology determines, based on the first margin data, whether to execute a signal training process.
    Type: Application
    Filed: February 8, 2019
    Publication date: March 24, 2022
    Applicant: Intel Corporation
    Inventors: Dujian WU, Shijian GE, Daocheng BU
  • RUNTIME POST PACKAGE REPAIR FOR DYNAMIC RANDOM ACCESS MEMORY
    Publication number: 20210311818
    Abstract: Systems, apparatuses and methods may provide for technology that handles failures in memory hardware (e.g., dynamic random access memory (DRAM)) via runtime post package repair. Such technology may include operations to perform a runtime post package repair in response to a memory hardware failure detected in the memory. In such an example, the runtime post package repair may be done after power up boot operations have been completed.
    Type: Application
    Filed: December 11, 2018
    Publication date: October 7, 2021
    Applicant: INTEL CORPORATION
    Inventors: Vincent Zimmer, Anil Agrawal, Dujian Wu, Shijian Ge, Zhenglong Wu