Abstract: A training system includes a dynamic random access memory (DRAM) configured to buffer training data; a central processing unit (CPU) coupled to the DRAM and configured to downsample the training data and provide the DRAM with the downsampled training data; a computational storage consisting of a solid-state drive (SSD) and field-programmable gate array (FPGA) and configured to perform dimensionality reduction on the downsampled training data to generate training data batches; and a graphic processing unit (GPU) configured to perform training on the training data batches.