Patents by Inventor Shimin Cui
Shimin Cui has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9110684Abstract: Embodiments of the present invention provide a method, system and computer program product for the data splitting of recursive data structures. In one embodiment of the invention, a method for data splitting recursive data structures can be provided. The method can include identifying data objects of a recursive data structure type, such as a linked list, within source code, the recursive data structure type defining multiple different data fields. The method further can include grouping the data objects into some memory pool units, each of which can contain the same number of data objects. Each memory pool unit can be seen as an array of data objects. The method can include data splitting, which could be maximal array splitting in each different memory pool unit. Finally, the method can include three different approaches, including field padding, field padding and field splitting, to handle irregular field sizes in the data structure.Type: GrantFiled: July 10, 2007Date of Patent: August 18, 2015Assignee: International Business Machines CorporationInventors: Roch G. Archambault, Shimin Cui, Stephen Curial, Yaoqing Gao, Raul E. Silvera, Peng Zhao
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Patent number: 9104577Abstract: A computer processor collects information for a dominant data access loop and reference code patterns based on data reference pattern analysis, and for pointer aliasing and data shape based on pointer escape analysis. The computer processor selects a candidate array for data splitting wherein the candidate array is referenced by a dominant data access loop. The computer processor determines a data splitting mode by which to split the data of the candidate array, based on the reference code patterns, the pointer aliasing, and the data shape information, and splits the data into two or more split arrays. The computer processor creates a software cache that includes a portion of the data of the two or more split arrays in a transposed format, and maintains the portion of the transposed data within the software cache and consults the software cache during an access of the split arrays.Type: GrantFiled: August 27, 2013Date of Patent: August 11, 2015Assignee: International Business Machines CorporationInventors: Christopher M. Barton, Shimin Cui, Satish K. Sadasivam, Raul E. Silvera, Mahavi G. Valluri, Steven W. White
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Publication number: 20150067268Abstract: A computer processor collects information for a dominant data access loop and reference code patterns based on data reference pattern analysis, and for pointer aliasing and data shape based on pointer escape analysis. The computer processor selects a candidate array for data splitting wherein the candidate array is referenced by a dominant data access loop. The computer processor determines a data splitting mode by which to split the data of the candidate array, based on the reference code patterns, the pointer aliasing, and the data shape information, and splits the data into two or more split arrays. The computer processor creates a software cache that includes a portion of the data of the two or more split arrays in a transposed format, and maintains the portion of the transposed data within the software cache and consults the software cache during an access of the split arrays.Type: ApplicationFiled: June 13, 2014Publication date: March 5, 2015Inventors: Christopher M. Barton, Shimin Cui, Satish K. Sadasivam, Raul E. Silvera, Madhavi G. Valluri, Steven W. White
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Publication number: 20150067260Abstract: A computer processor collects information for a dominant data access loop and reference code patterns based on data reference pattern analysis, and for pointer aliasing and data shape based on pointer escape analysis. The computer processor selects a candidate array for data splitting wherein the candidate array is referenced by a dominant data access loop. The computer processor determines a data splitting mode by which to split the data of the candidate array, based on the reference code patterns, the pointer aliasing, and the data shape information, and splits the data into two or more split arrays. The computer processor creates a software cache that includes a portion of the data of the two or more split arrays in a transposed format, and maintains the portion of the transposed data within the software cache and consults the software cache during an access of the split arrays.Type: ApplicationFiled: August 27, 2013Publication date: March 5, 2015Applicant: International Business Machines CorporationInventors: Christopher M. Barton, Shimin Cui, Satish K. Sadasivam, Raul E. Silvera, Mahavi G. Valluri, Steven W. White
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Publication number: 20150046913Abstract: Embodiments relate to data splitting for multi-instantiated objects. An aspect includes receiving a portion of source code for compilation having a dynamic object to split using object size array data splitting. Another aspect includes replacing all memory allocations for the dynamic object with a total size of an object size array and object field arrays including a predetermined padding. Another aspect includes inserting statements in the source code after the memory allocations to populate the object size array with a value of a number of elements of the object size array. Another aspect includes updating a stride for load and store operations using dynamic pointers. Yet another aspect includes modifying field references by adding a distance between the object size array and the object field array to respective address operations.Type: ApplicationFiled: June 19, 2014Publication date: February 12, 2015Inventors: Shimin Cui, Yan Zhang
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Patent number: 8484630Abstract: Optimizing program code in a static compiler by determining the live ranges of variables and determining which live ranges are candidates for moving code from the use site to the definition site of source code. Live ranges for variables in a flow graph are determined. Selected live ranges are determined as candidates in which code will be moved from a use site within the source code to a definition site within the source code. Optimization opportunities within the source code are identified based on the code motion.Type: GrantFiled: December 23, 2008Date of Patent: July 9, 2013Assignee: International Business Machines CorporationInventors: Shimin Cui, Raul Esteban Silvera
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Patent number: 8458679Abstract: May-constant propagation is a technique used to propagate a constant through the call graph and control flow graph by ignoring possible kills and re-definitions with low probability. Variables associated with constants in program code are determined. Execution flow probabilities are executed for code segments of the program code that comprise the variables. The execution flow probabilities are calculated based on flow data for the program code. At least a first of the code segments is determined to have a high execution flow probability. The first of the constants associated with the first variable are propagated through the flow data to generate modified flow data.Type: GrantFiled: September 22, 2010Date of Patent: June 4, 2013Assignee: International Business Machines CorporationInventors: Roch G. Archambault, Shimin Cui, Yaoqing Gao
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Publication number: 20130019232Abstract: An illustrative embodiment of a computer-implemented process for managing aliasing constraints, identifies an object to form an identified object, identifies a scope of the identified object to form an identified scope, and assigns a unique value to the identified object within the identified scope. The computer-implemented process further demarcates an entrance to the identified scope, demarcates an exit to the identified scope, optimizes the identified object using a property of the identified scope and associated aliasing information, tracks the identified object state to form tracked state information; and uses the tracked state information to update the identified object.Type: ApplicationFiled: July 10, 2012Publication date: January 17, 2013Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: SHIMIN CUI, RAUL E. SILVERA
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Patent number: 8352684Abstract: Computer implemented method, system and computer usable program code for cache management. A cache is provided, wherein the cache is viewed as a sorted array of data elements, wherein a top position of the array is a most recently used position of the array and a bottom position of the array is a least recently used position of the array. A memory access sequence is provided, and a training operation is performed with respect to a memory access of the memory access sequence to determine a type of memory access operation to be performed with respect to the memory access. Responsive to a result of the training operation, a cache replacement operation is performed using the determined memory access operation with respect to the memory access.Type: GrantFiled: September 23, 2008Date of Patent: January 8, 2013Assignee: International Business Machines CorporationInventors: Roch Georges Archambault, Shimin Cui, Chen Ding, Yaoqing Gao, Xiaoming Gu, Raul Esteban Silvera, Chengliang Zhang
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Patent number: 8332833Abstract: A computer implemented method for facilitating debugging of source code. The source code is scanned to identify a candidate region. A procedure control descriptor is generated, wherein the procedure control descriptor corresponds to the candidate region. The procedure control descriptor identifies, for the candidate region, a condition which, if true at runtime means that the candidate region can be specialized. Responsive to a determination during compile time that satisfaction of at least one condition will be known only at runtime, the procedure control descriptor is used to specialize the candidate region at compile time to create a first version of the candidate region for execution in a case where the condition is true and a second version of the candidate region for execution in a case where the condition is false, and further generate code to correctly select one of the first region and the second region at runtime.Type: GrantFiled: June 4, 2007Date of Patent: December 11, 2012Assignee: International Business Machines CorporationInventors: Roch Georges Archambault, Shimin Cui, Yaoqing Gao, Raul Esteban Silvera, Peng Zhao
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Patent number: 8161464Abstract: A method of compiling source code. The method includes converting pointer-based access in the source code to array-based access in the source code in a first pass compilation of the source code. Information is collected for objects in the source code during the first pass compilation. Candidate objects in the source code are selected based on the collected information to form selected candidate objects. Global stride variables are created for the selected candidate objects. Memory allocation operations are updated for the selected candidate objects in a second pass compilation of the source code. Multiple-level pointer indirect references are replaced in the source code with multi-dimensional array indexed references for the selected candidate objects in the second pass compilation of the source code.Type: GrantFiled: April 11, 2006Date of Patent: April 17, 2012Assignee: International Business Machines CorporationInventors: Roch Georges Archambault, Shimin Cui, Yaoqing Gao, Raul Esteban Silvera
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Patent number: 8146070Abstract: Inter-procedural strength reduction is provided by a mechanism of the present invention to optimize software program. During a forward pass, the present invention collects information of global variables and analyzes the information to select candidate computations for optimization. During a backward pass, the present invention replaces costly computations with less costly or weaker computations using pre-computed values and inserts store operations of new global variables to pre-compute the costly computations at definition points of the global variables used in the costly computations.Type: GrantFiled: November 13, 2008Date of Patent: March 27, 2012Assignee: International Business Machines CorporationInventors: Roch Georges Archambault, Shimin Cui, Raul Esteban Silvera
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Patent number: 8015556Abstract: A method of data reshaping for multidimensional dynamic array objects in the presence of multiple object instantiations. The method includes collecting all alias information using interprocedural point escape analysis, and collecting all shape information using interprocedural shape analysis. The method progresses with selecting the candidate dynamic objects based on alias and shape analysis, and determining the types of data reshaping for the candidate dynamic objects. The method further includes creating objects for selected dynamic objects with multiple object instantiations. The method proceeds by updating the memory allocation operations for the selected dynamic objects and inserting statements to initialize object descriptors. The method further includes creating the copy of the object descriptors for selected dynamic object assignments. The method concludes by replacing the object references by array-indexed references for selected dynamic objects using object descriptors.Type: GrantFiled: October 12, 2006Date of Patent: September 6, 2011Assignee: International Business Machines CorporationInventors: Shimin Cui, Raul E. Silvera
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Publication number: 20110072419Abstract: May-constant propagation is a technique used to propagate a constant through the call graph and control flow graph by ignoring possible kills and re-definitions with low probability. Variables associated with constants in program code are determined. Execution flow probabilities are executed for code segments of the program code that comprise the variables. The execution flow probabilities are calculated based on flow data for the program code. At least a first of the code segments is determined to have a high execution flow probability. The first of the constants associated with the first variable are propagated through the flow data to generate modified flow data.Type: ApplicationFiled: September 22, 2010Publication date: March 24, 2011Applicant: International Business Machines CorporationInventors: Roch G. Archambault, Shimin Cui, Yaoqing Gao
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Patent number: 7856627Abstract: A method for handling Simple Instruction Multiple Data (SIMD) architecture restrictions through data reshaping, padding, and alignment, including: building a global call graph; creating array descriptors for maintaining array attributes; gathering array affinity information; performing global pointer analysis and escape analysis; performing loop-based analysis to identify a SIMD opportunity; building an array affinity graph; performing graph partitioning on the array affinity graph to construct an array reshaping plan; performing data reshaping on the array affinity graph; and performing SIMDization on the array affinity graph wherein SIMDization comprises automatic generation of SIMD code.Type: GrantFiled: August 8, 2006Date of Patent: December 21, 2010Assignee: International Business Machines CorporationInventors: Roch G. Archambault, Shimin Cui, Yaoqing Gao, Raul E. Silvera
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Patent number: 7818731Abstract: A computer implemented method, system and computer program product for accessing threadprivate memory for threadprivate variables in a parallel program during program compilation. A computer implemented method for accessing threadprivate variables in a parallel program during program compilation includes aggregating threadprivate variables in the program, replacing references of the threadprivate variables by indirect references, moving address load operations of the threadprivate variables, and replacing the address load operations of the threadprivate variables by calls to runtime routines to access the threadprivate memory. The invention enables a compiler to minimize the runtime routines call times to access the threadprivate variables, thus improving program performance.Type: GrantFiled: May 29, 2008Date of Patent: October 19, 2010Assignee: International Business Machines CorporationInventors: Roch Georges Archambault, Shimin Cui
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Publication number: 20100162220Abstract: Optimizing program code in a static compiler by determining the live ranges of variables and determining which live ranges are candidates for moving code from the use site to the definition site of source code. Live ranges for variables in a flow graph are determined. Selected live ranges are determined as candidates in which code will be moved from a use site within the source code to a definition site within the source code. Optimization opportunities within the source code are identified based on the code motion.Type: ApplicationFiled: December 23, 2008Publication date: June 24, 2010Applicant: International Business Machines CorporationInventors: Shimin Cui, Raul Esteban Silvera
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Open multi-processing reduction implementation in cell broadband engine (CBE) single source compiler
Patent number: 7689977Abstract: The present disclosure is directed to a method for providing an OpenMP reduction implementation. The method may comprise creating an aggregate of at least one reduction variable in a parallel region or a work-sharing construct; defining a pointer variable, the pointer variable pointing to a dynamic array of the aggregate; creating an initialization routine, an outlined routine and a reduction accumulation routine; replacing the parallel region or the work-sharing construct with a runtime routine, the runtime routine taking a plurality of arguments including an address of the initialization routine, an address of the outlined routine, an address of the reduction accumulation routine, an address of the pointer variable, and a size of the aggregate; and executing the runtime routine when the at least one reduction variable is in the parallel region or the work-sharing construct.Type: GrantFiled: April 15, 2009Date of Patent: March 30, 2010Assignee: International Business Machines CorporationInventors: Guansong Zhang, Shimin Cui, Ettore Tiotto -
Publication number: 20100077153Abstract: Computer implemented method, system and computer usable program code for cache management. A cache is provided, wherein the cache is viewed as a sorted array of data elements, wherein a top position of the array is a most recently used position of the array and a bottom position of the array is a least recently used position of the array. A memory access sequence is provided, and a training operation is performed with respect to a memory access of the memory access sequence to determine a type of memory access operation to be performed with respect to the memory access. Responsive to a result of the training operation, a cache replacement operation is performed using the determined memory access operation with respect to the memory access.Type: ApplicationFiled: September 23, 2008Publication date: March 25, 2010Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Roch Georges Archambault, Shimin Cui, Chen Ding, Yaoqing Gao, Xiaoming Gu, Raul Esteban Silvera, Chengliang Zhang
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Patent number: 7590977Abstract: A computer implemented method, system and computer program product for accessing threadprivate memory for threadprivate variables in a parallel program during program compilation. A computer implemented method for accessing threadprivate variables in a parallel program during program compilation includes aggregating threadprivate variables in the program, replacing references of the threadprivate variables by indirect references, moving address load operations of the threadprivate variables, and replacing the address load operations of the threadprivate variables by calls to runtime routines to access the threadprivate memory. The invention enables a compiler to minimize the runtime routines call times to access the threadprivate variables, thus improving program performance.Type: GrantFiled: October 13, 2005Date of Patent: September 15, 2009Assignee: International Business Machines CorporationInventors: Roch Georges Archambault, Shimin Cui