Abstract: A receiver circuit includes a source-follower input stage and a far-end crosstalk (FEXT) reduction circuit. The source-follower input stage is configured to receive a first signal over a first transmission line. The FEXT reduction circuit is coupled to the source-follower input stage and is configured to derive, from a second signal on a second transmission line, an approximated FEXT signal that approximates an interfering signal induced in the first transmission line by the second signal, and reduce a level of the interfering signal by combining the approximated FEXT signal and the first signal.

Abstract: An electronic circuit for current generation includes a source-follower based current source and a voltage compensation semiconductor device. The source-follower based current source is configured to output a reference current, the current source including a main transistor which is configured to derive the reference current from a reference voltage, wherein the main transistor has a voltage drop that varies with temperature and process variations. The voltage compensation semiconductor device is configured to be biased with bias currents that increase the reference voltage provided to the main transistor by an offset voltage that matches the voltage drop of the main transistor across at least part of the temperature and process variations, thereby pre-compensating for the voltage drop of the main transistor.

Abstract: A receiver circuit includes a source-follower input stage and a far-end crosstalk (FEXT) reduction circuit. The source-follower input stage is configured to receive a first signal over a first transmission line. The FEXT reduction circuit is coupled to the source-follower input stage and is configured to derive, from a second signal on a second transmission line, an approximated FEXT signal that approximates an interfering signal induced in the first transmission line by the second signal, and reduce a level of the interfering signal by combining the approximated FEXT signal and the first signal.

Abstract: Aspects of the disclosure provide an amplifier system and a method for dynamically cancelling an offset voltage. The amplifier system includes a chopper amplifier system that includes a differential amplifier with an offset calibration circuit. The chopper amplifier system is configured to generate an output signal including voltage variations indicating an offset voltage of the differential amplifier. The amplifier system also includes a feedback circuit configured to determine a polarity of the offset voltage of the differential amplifier based on the output signal, and to transmit a control signal to the offset calibration circuit to reduce the offset voltage of the differential amplifier.

Abstract: Aspects of the disclosure provide a circuit. The circuit includes a voltage step up circuit, a voltage control unit, and a complementary voltage generator. The voltage step up circuit is configured to receive a primary supply voltage of a first voltage level and output a secondary supply voltage of a second voltage level that is higher than the first voltage level. The voltage control unit is configured to receive the secondary supply voltage and to output a control voltage having a voltage level in a range from a ground level to the second voltage level. The complementary voltage generator is configured to operate based on the primary supply voltage and to generate a pair of complementary signals in response to the control voltage. The voltage sum of the pair of complementary signals is equivalent to the first voltage level.

Abstract: Systems and methods are provided for a power supply. A first output stage is configured to supply power from a power source at a target voltage to a device in an integrated circuit in response to a power demand of the device. Load detector circuitry is configured to detect a load resulting from operation of the device, and a supplemental output stage is configured to selectively supply supplemental power from the power source to the device, in addition to the power provided by the first output stage, in response to detection of an additional load resulting from operation of the device.

Abstract: Systems and methods are provided for a power supply. A first output stage is configured to supply power from a power source at a target voltage to a device in an integrated circuit in response to a power demand of the device. Load detector circuitry is configured to detect a load resulting from operation of the device, and a supplemental output stage is configured to selectively supply supplemental power from the power source to the device, in addition to the power provided by the first output stage, in response to detection of an additional load resulting from operation of the device.

Abstract: Systems and methods are provided for a power supply. A first output stage is configured to supply power from a power source at a target voltage to a device in an integrated circuit in response to a power demand of the device. Load detector circuitry is configured to detect a load resulting from operation of the device, and a supplemental output stage is configured to selectively supply supplemental power from the power source to the device, in addition to the power provided by the first output stage, in response to detection of an additional load resulting from operation of the device.

Abstract: Aspects of the disclosure provide an integrated circuit having a delay element that is configured as a complementary voltage based current starved delay element. The delay element drives an output node to generate an output signal in response to an input signal received at an input node. The delay element includes a first switch transistor configured to switch on in response to the input signal satisfying a switching condition, and a second switch transistor configured to switch on in response to the input signal satisfying the switching condition. The first switch transistor drives the output node with a first current that is controlled by a first bias voltage. The second switch transistor drives the output node with a second current that is controlled by a second bias voltage. The first bias voltage and the second bias voltage are complementary. In an example, both the first switch transistor and the second switch transistor are NMOS transistors.

Abstract: Some of the embodiments of the present disclosure provide a method comprising receiving a first signal and a second signal; generating a first digital count corresponding to a characteristic of the first signal; subsequent to generating the first digital count, generating a second digital count corresponding to a characteristic of the second signal; and comparing the first digital count with the second digital count. Other embodiments are also described and claimed.

Abstract: Embodiments of the present disclosure provide an integrated circuit, comprising a first feed forward equalizing (FFE) circuit configured to operate based on receipt of a first common mode voltage; a second FFE circuit coupled to the first FFE circuit, the second FFE circuit configured to operate based on receipt of a second common mode voltage that is different than the first common mode voltage; and a decision circuit coupled to both the first FFE circuit and the second FFE circuit, the decision circuit configured to selectively provide the first common mode voltage to the first FFE circuit or the second common mode voltage to the second FFE circuit.

Abstract: Aspects of the disclosure provide a method for calibrating pulse-width based measurement. The method includes generating a sloped time varying signal having a voltage level that varies with time, and generating a calibration pulse having a first calibration edge and a second calibration edge. The first calibration edge corresponds to a first calibration time that the sloped time varying signal has a first reference voltage, and the second calibration edge corresponds to a second calibration time that the sloped time varying signal has a second reference voltage. Further, the method includes modifying a parameter that governs a slope of the sloped time varying signal to calibrate the slope, such that a calibration pulse width of the calibration pulse is substantially equivalent to a reference time length. Then, the method includes performing pulse-width based measurement based on the calibrated slope.

Abstract: Systems and methods are provided for a power supply. A first output stage is configured to supply power from a power source at a target voltage to a device in an integrated circuit in response to a power demand of the device. Load detector circuitry is configured to detect a load resulting from operation of the device, and a supplemental output stage is configured to selectively supply supplemental power from the power source to the device, in addition to the power provided by the first output stage, in response to detection of an additional load resulting from operation of the device.

Abstract: Aspects of the disclosure provide a voltage controlled oscillator. The voltage controlled oscillator can include a plurality of oscillation stages coupled together to generate an oscillation signal having an oscillation frequency. At least one oscillation stage of the plurality of oscillation stages can include a first portion driven by a first driving power that can be a function of a control voltage and a second portion driven by a second driving power that can be substantially independent of the control voltage. The first driving power can be provided by a first power rail in the form of a driving current that is a function of the control voltage. The second driving power can be provided by a second power rail in the form of a substantially constant voltage that is substantially independent of the control voltage.

Abstract: The disclosure provides methods and apparatuses of measuring a temperature. A method of measuring a temperature can include generating a time varying signal that varies with time in a known manner, such as having a repeating sawtooth waveform. Further, the method can include generating a first intersecting signal that intersects with the time varying signal at a first time, and generating a second intersecting signal that varies with temperature and intersects with the time varying signal at a second time. Subsequently, the method can construct a pulse signal having a first edge corresponding to the first time and a second edge corresponding to the second time, with the pulse signal having a width corresponding to the temperature.

Abstract: The disclosure provides methods and apparatuses of measuring a temperature. A method of measuring a temperature can include generating a time varying signal that varies with time in a known manner, such as having a repeating sawtooth waveform. Further, the method can include generating a first intersecting signal that intersects with the time varying signal at a first time, and generating a second intersecting signal that varies with temperature and intersects with the time varying signal at a second time. Subsequently, the method can construct a pulse signal having a first edge corresponding to the first time and a second edge corresponding to the second time, with the pulse signal having a width corresponding to the temperature.

Abstract: An electrical supply safety plug that prevents power from a mains electrical supply from being accessible to an electrical appliance unless the electrical supply safety plug is properly engaged with the socket outlets and the appliance is turned on. The electrical supply safety plug disconnects the electrical appliance in the event of current imbalance.

Abstract: An electrical supply safety socket that prevents power from a mains electrical supply to be accessible at the outlets of the socket unless an electrical appliance plug is properly engaged with the socket outlets and the appliance is turned on. The electrical supply safety socket is comprised of both a safety circuit and a safety socket which may act together to accomplish the above-described safety function. The safety circuit and the safety socket may also be used independently so as to provide similar safety functions.

Abstract: What is described is an electrical safety socket arrangement, comprising live and neutral socket inlets, switches connecting the live and neutral socket inlets to respective live and neutral socket outlets, and a circuit control which operates the switches when live and neutral supply feeders are connected to the socket inlets and a circuit is completed such that the circuit is completed by the connection of an appliance across the live and neutral socket outlets.

Abstract: An electrical safety socket in which the neutral and live socket outlets are electrically isolated until substantially parallel pins of a two- or three-in plug are inserted therein. The neutral and live socket outlets are resiliently biased into a non-parallel disposition such that insertion of a plug into the socket rotates them into a mutually parallel orientation, at the same time causing laterally disposed abutting means to impinge on a switch assembly, thereby closing neutral and live switches connected between the live and neutral feeders and the respective socket outlets. Also disclosed is a safety lamp socket having a split collar which is splayed apart upon insertion of a lamp. Armatures attached to respective collar components are thereby pivotally displaced about pivots fixed to the socket housing, opposite ends of the armatures impinging on neutral and live switch contacts so as to close the corresponding switches and connect the neutral and live feeders to the respective socket outlets.