Patents by Inventor Shin-Chuan Chiang

Shin-Chuan Chiang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200006405
    Abstract: A manufacturing method of a semiconductor thin film transistor (TFT) and a display panel are provided. According to the manufacturing method, a substrate is provided. A semiconductor pattern is formed on the substrate. A first insulating layer is formed on the substrate and covers the semiconductor pattern. A first metal layer is formed on the first insulating layer, and the first insulating layer is located between the semiconductor pattern and the first metal layer. A half-tone mask photoresist pattern is formed on the first metal layer. The half-tone mask photoresist pattern exposes a portion of the first metal layer. The portion of the first metal layer exposed by the half-tone mask photoresist pattern is removed to form a gate. The gate covers a portion of the semiconductor pattern. A source and a drain are formed on the semiconductor pattern.
    Type: Application
    Filed: August 31, 2018
    Publication date: January 2, 2020
    Applicant: Chunghwa Picture Tubes, LTD.
    Inventors: Hsi-Ming Chang, Shin-Chuan Chiang, Yen-Yu Huang
  • Patent number: 10373819
    Abstract: A processing method of a substrate is provided. The substrate is processed by a substrate processing apparatus. The substrate processing apparatus includes a reaction chamber and a secondary chamber surrounding the reaction chamber. The processing method includes: placing the substrate in the reaction chamber; performing a process to increase a pressure in the reaction chamber and a pressure in the secondary chamber, such that the pressure in the secondary chamber is between an atmospheric pressure and the pressure in the reaction chamber; increasing a temperature in the reaction chamber; and processing the substrate by a supercritical fluid in the reaction chamber.
    Type: Grant
    Filed: February 2, 2018
    Date of Patent: August 6, 2019
    Assignee: Chunghwa Picture Tubes, LTD.
    Inventors: Hsi-Ming Chang, Shin-Chuan Chiang, Yen-Yu Huang
  • Publication number: 20190148137
    Abstract: A processing method of a substrate is provided. The substrate is processed by a substrate processing apparatus. The substrate processing apparatus includes a reaction chamber and a secondary chamber surrounding the reaction chamber. The processing method includes: placing the substrate in the reaction chamber; performing a process to increase a pressure in the reaction chamber and a pressure in the secondary chamber, such that the pressure in the secondary chamber is between an atmospheric pressure and the pressure in the reaction chamber; increasing a temperature in the reaction chamber; and processing the substrate by a supercritical fluid in the reaction chamber.
    Type: Application
    Filed: February 2, 2018
    Publication date: May 16, 2019
    Applicant: Chunghwa Picture Tubes, LTD.
    Inventors: Hsi-Ming Chang, Shin-Chuan Chiang, Yen-Yu Huang
  • Publication number: 20190115539
    Abstract: An organic light emitting diode includes a substrate, a bottom electrode, a first dielectric layer, a second dielectric layer, an organic light emitting layer, and a top electrode. The bottom electrode is disposed on the substrate. The first dielectric layer is disposed on the bottom electrode and has a first opening. The second dielectric layer is disposed on the first dielectric layer and has a second opening. The second opening is aligned with the first opening and exposes a portion of an upper surface of the bottom electrode. The organic light emitting layer is disposed in the first opening and the second opening. The organic light emitting layer contact the potion of the upper surface of the bottom electrode. The top electrode covers the organic light emitting layer.
    Type: Application
    Filed: November 29, 2017
    Publication date: April 18, 2019
    Inventors: Wen-Kuang TSAO, Shin-Chuan CHIANG, Der-Chun WU, Yen-Yu HUANG
  • Publication number: 20170025443
    Abstract: A method manufacturing a thin film transistor is provided. A gate, a first insulation layer covering the gate, a semiconductor layer over the gate, and a first photoresist pattern are sequentially formed on a substrate. The semiconductor layer is patterned into a channel layer by using the first photoresist pattern as a mask and the first photoresist pattern is subsequently shrunken to remain a portion of the first photoresist pattern on the channel layer. A conductive material layer covering the remained portion of the first photoresist pattern, the channel layer and the first insulation layer is patterned by using a second photoresist pattern as a mask to form a source and a drain separated by a gap region exposing the remained portion. The second photoresist pattern and the remained portion are removed by performing a stripping process to expose the channel layer between the source and the drain.
    Type: Application
    Filed: July 24, 2015
    Publication date: January 26, 2017
    Inventors: Der-Chun Wu, Shin-Chuan Chiang, Yu-Hsien Chen, Po-Lung Chen, Yi-Hsien Lin, Cheng-Jung Yang, Kuo-Hsing Tseng
  • Patent number: 9543330
    Abstract: A method manufacturing a thin film transistor is provided. A gate, a first insulation layer covering the gate, a semiconductor layer over the gate, and a first photoresist pattern are sequentially formed on a substrate. The semiconductor layer is patterned into a channel layer by using the first photoresist pattern as a mask and the first photoresist pattern is subsequently shrunken to remain a portion of the first photoresist pattern on the channel layer. A conductive material layer covering the remained portion of the first photoresist pattern, the channel layer and the first insulation layer is patterned by using a second photoresist pattern as a mask to form a source and a drain separated by a gap region exposing the remained portion. The second photoresist pattern and the remained portion are removed by performing a stripping process to expose the channel layer between the source and the drain.
    Type: Grant
    Filed: July 24, 2015
    Date of Patent: January 10, 2017
    Assignee: Chunghwa Picture Tubes, Ltd.
    Inventors: Der-Chun Wu, Shin-Chuan Chiang, Yu-Hsien Chen, Po-Lung Chen, Yi-Hsien Lin, Cheng-Jung Yang, Kuo-Hsing Tseng
  • Patent number: 9385145
    Abstract: A double thin film transistor includes a first semiconductor layer, a gate, a second semiconductor layer, a first insulating layer, a second insulating layer, a first source, a first drain, a second source and a second drain. The first semiconductor layer is disposed over a substrate. The gate is disposed over the first semiconductor layer. The second semiconductor layer is disposed over the gate, and the first and second semiconductor layers are the same conductive type. The first insulating layer is disposed between the first semiconductor layer and the gate. The second insulating layer is disposed between the gate and the second semiconductor layer. The first source and the first drain are disposed between the substrate and the second insulating layer. The second source and the second drain are disposed over the second insulating layer.
    Type: Grant
    Filed: November 26, 2014
    Date of Patent: July 5, 2016
    Assignee: CHUNGHWA PICTURE TUBES, LTD.
    Inventors: Shin-Chuan Chiang, Ya-Ju Lu, Yu-Hsien Chen, Yen-Yu Huang
  • Patent number: 9373683
    Abstract: The thin film transistor includes a gate, a gate insulating layer, a semiconductor layer, and a source and a drain. The gate insulating layer covers the gate. The semiconductor layer is located on the gate insulating layer which is disposed above the gate. The source and the drain are disposed above the gate insulating layer and are electrically connected to the semiconductor layer, respectively. The source and the drain are respectively located in different layers. A first contact resistance is existed between the semiconductor layer and the source, a second contact resistance is existed between the semiconductor layer and the drain, and. the first contact resistance is less than the second contact resistance.
    Type: Grant
    Filed: October 6, 2014
    Date of Patent: June 21, 2016
    Assignee: Chunghwa Picture Tubes, LTD.
    Inventors: Shin-Chuan Chiang, En-Chih Liu, Yu-Hsien Chen, Ya-Ju Lu, Yen-Yu Huang
  • Publication number: 20160079285
    Abstract: A double thin film transistor includes a first semiconductor layer, a gate, a second semiconductor layer, a first insulating layer, a second insulating layer, a first source, a first drain, a second source and a second drain. The first semiconductor layer is disposed over a substrate. The gate is disposed over the first semiconductor layer. The second semiconductor layer is disposed over the gate, and the first and second semiconductor layers are the same conductive type. The first insulating layer is disposed between the first semiconductor layer and the gate. The second insulating layer is disposed between the gate and the second semiconductor layer. The first source and the first drain are disposed between the substrate and the second insulating layer. The second source and the second drain are disposed over the second insulating layer.
    Type: Application
    Filed: November 26, 2014
    Publication date: March 17, 2016
    Inventors: Shin-Chuan Chiang, Ya-Ju Lu, Yu-Hsien Chen, Yen-Yu Huang
  • Publication number: 20160027873
    Abstract: The thin film transistor includes a gate, a gate insulating layer, a semiconductor layer, and a source and a drain. The gate insulating layer covers the gate. The semiconductor layer is located on the gate insulating layer which is disposed above the gate. The source and the drain are disposed above the gate insulating layer and are electrically connected to the semiconductor layer, respectively. The source and the drain are respectively located in different layers. A first contact resistance is existed between the semiconductor layer and the source, a second contact resistance is existed between the semiconductor layer and the drain, and. the first contact resistance is less than the second contact resistance.
    Type: Application
    Filed: October 6, 2014
    Publication date: January 28, 2016
    Inventors: Shin-Chuan Chiang, En-Chih Liu, Yu-Hsien Chen, Ya-Ju Lu, Yen-Yu Huang
  • Patent number: 8614444
    Abstract: A top-gate transistor array substrate includes a transparent substrate with a plane, an ion release layer, a pixel array, and a first insulating layer. The ion release layer is disposed on the transparent substrate and completely covers the plane. The pixel array is disposed on the ion release layer and includes a plurality of transistors and a plurality of pixel electrodes. Each of the transistors includes a source, a drain, a gate and a MOS (metal oxide semiconductor) layer. The drain, the source and the MOS layer are disposed on the ion release layer. The pixel electrodes are electrically connected to the drains respectively. The gate is disposed above the MOS layer. The first insulating layer is disposed between the MOS layers and the gates. The MOS layer contacts the ion release layer. The ion release layer can release a plurality of ions into the MOS layers.
    Type: Grant
    Filed: November 1, 2011
    Date of Patent: December 24, 2013
    Assignees: Chunghwa Picture Tubes, Ltd., National Chiao Tung University
    Inventors: Huang-Chung Cheng, Yu-Chih Huang, Po-Yu Yang, Shin-Chuan Chiang, Huai-An Li
  • Publication number: 20130009144
    Abstract: A top-gate transistor array substrate includes a transparent substrate with a plane, an ion release layer, a pixel array, and a first insulating layer. The ion release layer is disposed on the transparent substrate and completely covers the plane. The pixel array is disposed on the ion release layer and includes a plurality of transistors and a plurality of pixel electrodes. Each of the transistors includes a source, a drain, a gate and a MOS (metal oxide semiconductor) layer. The drain, the source and the MOS layer are disposed on the ion release layer. The pixel electrodes are electrically connected to the drains respectively. The gate is disposed above the MOS layer. The first insulating layer is disposed between the MOS layers and the gates. The MOS layer contacts the ion release layer. The ion release layer can release a plurality of ions into the MOS layers.
    Type: Application
    Filed: November 1, 2011
    Publication date: January 10, 2013
    Inventors: Huang-Chung CHENG, Yu-Chih HUANG, Po-Yu YANG, Shin-Chuan CHIANG, Huai-An LI
  • Publication number: 20120231588
    Abstract: A manufacturing method of thin film transistors is provided. The manufacturing method includes: providing a substrate; forming a gate electrode; forming a gate insulating layer; forming a patterned oxide semiconductor layer; forming a source electrode and a drain electrode; and executing a localized laser treatment. A laser beam is used to irradiate at least a part of the patterned oxide semiconductor layer in the localized laser treatment. An electrical resistitivity of the patterned oxide semiconductor layer irradiated by the laser beam is lower than an electrical resistitivity of the patterned oxide semiconductor layer without being irradiated by the laser beam.
    Type: Application
    Filed: May 26, 2011
    Publication date: September 13, 2012
    Inventors: Shin-Chuan Chiang, Yu-Hao Lai, Huai-An Li
  • Patent number: 8222095
    Abstract: A method for fabricating a thin film transistor is provided. A gate is formed on a substrate. A gate insulating layer is formed on the substrate to cover the gate. A metal oxide material layer is formed on the gate insulating layer. A photoresist layer is formed on the metal oxide material layer, in which a thickness of the photoresist layer above the gate is larger than that of the photoresist layer above two sides adjacent to the gate. A portion of the metal oxide material layer is removed to form a metal oxide active layer by using the photoresist layer as a mask. The photoresist layer above the two sides adjacent to the gate is removed and the remaining photoresist layer covers a portion of the metal oxide active layer. A source and a drain are formed on the metal oxide active layer covered by the photoresist layer.
    Type: Grant
    Filed: October 27, 2008
    Date of Patent: July 17, 2012
    Assignees: Taiwan TFT LCD Association, Chunghwa Picture Tubes, Ltd., Au Optronics Corporation, Hannstar Display Corporation, Chi Mei Optoelectronics Corporation, Industrial Technology Research Institute
    Inventors: Fang-Chen Luo, Shuo-Wei Liang, Shin-Chuan Chiang, Chao-Nan Chen, Chin-Chih Yu
  • Patent number: 8106389
    Abstract: A thin film transistor is provided. The thin film transistor includes a substrate, a gate, a source/drain, an insulating layer, and a semiconductor active layer. The gate and the source/drain are respectively deposited on the substrate and are separated by the insulating layer on the substrate. The semiconductor active layer connects the source and the drain. The material of the semiconductor active layer is a semiconductor precursor which produces semiconductor property after being irradiated by a light source. A liquid crystal display which includes the above thin film transistor is also provided.
    Type: Grant
    Filed: October 28, 2009
    Date of Patent: January 31, 2012
    Assignees: Taiwan TFT LCD Association, Chunghwa Picture Tubes, Ltd., Au Optronics Corporation, Hannstar Display Corporation, Chi Mei Optoelectronics Corporation, Industrial Technology Research Institute, TPO Displays Corp.
    Inventors: Hsiang-Yuan Cheng, Shin-Chuan Chiang, Shih-Hsiang Lai, Chin-Chih Yu, Bor-Chuan Chuang
  • Patent number: 7745267
    Abstract: A manufacturing method of an active layer of a thin film transistor is provided. The method includes following steps. First a substrate is provided, and a semiconductor precursor solution is then prepared through a liquid process. Thereafter, the semiconductor precursor solution is provided on the substrate to form a semiconductor precursor thin film. After that, a light source is used to irradiate the semiconductor precursor thin film to remove residual solvent and allow the semiconductor precursor thin film to produce semiconductor property, so as to form a semiconductor active layer.
    Type: Grant
    Filed: December 22, 2006
    Date of Patent: June 29, 2010
    Assignees: Taiwan TFT LCD Association, Chunghwa Picture Tubes, Ltd., Au Optronics Corporation, Hannstar Display Corporation, Chi Mei Optoelectronics Corporation, Industrial Technology Research Institute, TPO Dispalys Corp.
    Inventors: Hsiang-Yuan Cheng, Shin-Chuan Chiang, Shih-Hsiang Lai, Chin-Chih Yu, Bor-Chuan Chuang
  • Publication number: 20100044696
    Abstract: A thin film transistor is provided. The thin film transistor includes a substrate, a gate, a source/drain, an insulating layer, and a semiconductor active layer. The gate and the source/drain are respectively deposited on the substrate and are separated by the insulating layer on the substrate. The semiconductor active layer connects the source and the drain. The material of the semiconductor active layer is a semiconductor precursor which produces semiconductor property after being irradiated by a light source. A liquid crystal display which includes the above thin film transistor is also provided.
    Type: Application
    Filed: October 28, 2009
    Publication date: February 25, 2010
    Applicants: TAIWAN TFT LCD ASSOCIATION, CHUNGHWA PICTURE TUBES, LTD., AU OPTRONICS CORPORATION, HANNSTAR DISPLAY CORPORATION, CHI MEI OPTOELECTRONICS CORPORATION, INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE, TPO DISPLAYS CORP.
    Inventors: Hsiang-Yuan Cheng, Shin-Chuan Chiang, Shih-Hsiang Lai, Chin-Chih Yu, Bor-Chuan Chuang
  • Publication number: 20090305473
    Abstract: A method for fabricating a thin film transistor is provided. A gate is formed on a substrate. A gate insulating layer is formed on the substrate to cover the gate. A metal oxide material layer is formed on the gate insulating layer. A photoresist layer is formed on the metal oxide material layer, in which a thickness of the photoresist layer above the gate is larger than that of the photoresist layer above two sides adjacent to the gate. A portion of the metal oxide material layer is removed to form a metal oxide active layer by using the photoresist layer as a mask. The photoresist layer above the two sides adjacent to the gate is removed and the remaining photoresist layer covers a portion of the metal oxide active layer. A source and a drain are formed on the metal oxide active layer covered by the photoresist layer.
    Type: Application
    Filed: October 27, 2008
    Publication date: December 10, 2009
    Applicants: TAIWAN TFT LCD ASSOCIATION, CHUNGHWA PICTURE TUBES, LTD., AU OPTRONICS CORPORATION, HANNSTAR DISPLAY CORPORATION, CHI MEI OPTOELECTRONICS CORPORATION, INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Fang-Chen Luo, Shuo-Wei Liang, Shin-Chuan Chiang, Chao-Nan Chen, Chin-Chih Yu
  • Publication number: 20080057631
    Abstract: A manufacturing method of an active layer of a thin film transistor is provided. The method includes following steps. First a substrate is provided, and a semiconductor precursor solution is then prepared through a liquid process. Thereafter, the semiconductor precursor solution is provided on the substrate to form a semiconductor precursor thin film. After that, a light source is used to irradiate the semiconductor precursor thin film to remove residual solvent and allow the semiconductor precursor thin film to produce semiconductor property, so as to form a semiconductor active layer.
    Type: Application
    Filed: December 22, 2006
    Publication date: March 6, 2008
    Applicants: TAIWAN TFT LCD ASSOCIATION, CHUNGHWA PICTURE TUBES, LTD., AU OPTRONICS CORPORATION, HANNSTAR DISPLAY CORPORATION, CHI MEI OPTOELECTRONICS CORPORATION, INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE, TPO DISPLAYS CORP.
    Inventors: Hsiang-Yuan Cheng, Shin-Chuan Chiang, Shih-Hsiang Lai, Chin-Chih Yu, Bor-Chuan Chuang
  • Publication number: 20070141838
    Abstract: A direct patterning method for manufacturing a metal layer of a semiconductor device is provided. The claimed method reduces the materials and hours required by prior methods such as the thin film depositing method for a substrate, and the photolithographic method for manufacturing a transistor. The preferred embodiment of the present invention comprises a step of defining the pattern of the seeder material and a step of selectively thin film deposition. The direct patterned technology for the seeder and a chemical bath deposition (CBD) are utilized to provide the thin film growing method with non-vacuum and selective deposition. The object of the invention is applied to produce the wire or electrode, within the semiconductor device, or to deposit and manufacture the thin film in the large-area transistor array or a reflective layer.
    Type: Application
    Filed: May 26, 2006
    Publication date: June 21, 2007
    Inventors: Ming-Nan Hsiao, Shin-Chuan Chiang, Bor-Chuan Chuang