Patents by Inventor Shinichi Suto

Shinichi Suto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20120021063
    Abstract: To provide a collagen/elastin crosslinked material capable of satisfactorily corresponding to various uses such as medical materials including an artificial dermis and scaffolding materials for cell culture. The collagen/elastin crosslinked material is obtained by crosslinking a fish-derived collagen and a fish-derived elastin, and is fully capable of corresponding to various uses such as medical materials including an artificial dermis and scaffold material for cell culture.
    Type: Application
    Filed: March 10, 2010
    Publication date: January 26, 2012
    Applicants: MARUHA NICHIRO FOODS, INC., HIROSAKI UNIVERSITY, SAPPORO MEDICAL UNIVERSITY
    Inventors: Yoshitaka Matsumoto, Takatoshi Yotsuyanagi, Shinichi Suto, Yoshifumi Yamaya, Yosuke Hoshino, Kazunari Nishimura, Tomoko Koga, Hiroyuki Enari
  • Patent number: 6504876
    Abstract: The pulse signal generating apparatus includes a control circuit, a shift register, a counter and a processor. The control circuit generates a trigger signal to trigger a transition of a signal level. The shift register to which level data to define a signal level is set and in which the level data is serially shifted in response to the trigger signal from the control circuit to generate a pulse signal. The pulse signal is generated based on data shifted out from the shift register. The counter increments a content according to the trigger signal from the control circuit to generate an interruption signal every time the content reaches a predetermined value. The processor sets the level data in the shift register in response to the interruption signal from the counter.
    Type: Grant
    Filed: September 8, 1999
    Date of Patent: January 7, 2003
    Assignee: NEC Corporation
    Inventor: Shinichi Suto
  • Patent number: 6008672
    Abstract: An input signal reading circuit includes an up-down counter receiving an input signal and a sampling clock to count up the samplig clock when the input signal is at a high level and to count down the sampling clock when the input signal is at a low level. The up-down counter outputs an underflow signal when a count value of the up-down counter becomes zero. A comparator compares the count value of the up-down counter with a reference value held in a register, to generate a coincidence signal when the count value of the up-down counter becomes coincident with the reference value. A RS flipflop is set by the coincidence signal to bring the read-out signal into a high level, and is reset by the underflow signal to bring the read-out signal into a low level.
    Type: Grant
    Filed: November 10, 1997
    Date of Patent: December 28, 1999
    Assignee: NEC Corporation
    Inventor: Shinichi Suto