Patents by Inventor Shin-ichi Tanaka

Shin-ichi Tanaka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5898394
    Abstract: A code conversion method and apparatus is provided for scrambling and modulating data. The method and apparatus includes scrambling an input main data unit based on any of plural types of pseudo-random number sequences, and modulating the scrambled main data unit based on any of plural types of modulation data. An output main data unit is produced from the modulated main data unit, and a calculated value representing a difference between a number of 0 bits and a number of 1 bits included in the output main data unit is obtained. Any of the modulation data is then selected dependent upon the calculated value.
    Type: Grant
    Filed: July 25, 1997
    Date of Patent: April 27, 1999
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Yoshiharu Kobayashi, Akira Mutoh, Shin-ichi Tanaka, Nobuo Akahira
  • Patent number: 5881037
    Abstract: A digital video disk stores data codes and multifunctional synchronization codes in a data structure. The synchronization codes contain type information code identifying whether the synchronization code is located in a code sequence at the beginning of the data block, the beginning of a data block sector other than the first sector in the data block, the beginning of a line, or the middle of a line. The type information is expressed by two alternative patterns, type information code 1 and type information code 2, expressing the same information and differing in the number of is in the 5-bit sequence, i.e., an odd or even number of 1s. Which one of the two type information code pattern is used is selected according to the DSV so as to minimize bias in the dc component of the frame following the synchronization code.
    Type: Grant
    Filed: July 1, 1997
    Date of Patent: March 9, 1999
    Assignees: Kabushiki Kaisha Toshiba, Matsushita Electric Industrial Co., Ltd.
    Inventors: Shin-ichi Tanaka, Toshiyuki Shimada, Tadashi Kojima, Koichi Hirayama
  • Patent number: 5878018
    Abstract: The optical recording medium of this invention includes: a first substrate having a first information surface; a semitransparent reflection film formed on the first information surface of the first substrate; a second substrate having a second information surface; a reflection film formed on the second information surface of the second substrate; and an adhesive layer for adhering the first substrate and the second substrate so that the first information surface and the second information surface face each other, wherein the thickness of the first substrate is 0.56 mm or more, the thickness of the adhesive layer is 30 .mu.m or more, and the total thickness of the first substrate and the adhesive layer is 0.68 mm or less.
    Type: Grant
    Filed: July 17, 1997
    Date of Patent: March 2, 1999
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Mitsurou Moriya, Shin-ichi Tanaka, Yasuhiro Sugihara, Hiroshi Taniguchi, Michiyoshi Nagashima
  • Patent number: 5867475
    Abstract: An optical record carrier and methods and apparatuses for recording and reproducing an information on and from said optical recording carrier, whereby the effects of crosstalk from adjacent tracks is reduced, and stable tracing control is possible, is achieved. A recording track to which information divided into sector units is recorded is formed in a spiral or concentric pattern on the surface of the optical record carrier. Each sector further comprises sixty frames. Each frame comprises a re-sync pattern, frame address, data, and postamble fields. Identification information identifying the sector location of the information is recorded to the data block of the first frame. The user data is recorded after the data is scrambled using a value generated by a fifteen-stage maximum-length sequence generator based on the value of this identification information.
    Type: Grant
    Filed: January 30, 1998
    Date of Patent: February 2, 1999
    Assignees: Matsushita Electric Industrial Co., Ltd., Kabushiki Kaisha Toshiba
    Inventors: Mitsurou Moriya, Shin-ichi Tanaka, Koichi Hirayama
  • Patent number: 5774078
    Abstract: The information to be recorded is divided into 8-bit long data words. Each data word is then converted to 14-bit long code word. The code words are sequentially connected with a one-bit merging bit inserted between the code words to define a code bit sequence. The run-length of 0s in the code bit sequence is limited to be between 2 and 11. The one-bit merging bit normally takes a bit value of 0, but is changed to 1 when any one of the T.sub.min control or T.sub.max control is applied so as to accomplish the run-length limitation. The T.sub.min control is applied when the adjacent bits on both sides of the merging bit are 1s. The T.sub.max control is applied when trailing P bits of a code word preceding the merging bit and leading Q bits of a code word following the merging bit are all 0s, provided that P+Q.gtoreq.11, and in this case, at least either one of the P bits and Q bits has a bit sequence of (00000), and the bit sequence (00000) is changed to (00100).
    Type: Grant
    Filed: April 5, 1996
    Date of Patent: June 30, 1998
    Assignees: Matsushita Electric Industrial Co., Ltd., Kabushiki Kaisha Toshiba
    Inventors: Shin-ichi Tanaka, Toshiyuki Shimada, Koichi Hirayama, Hisashi Yamada
  • Patent number: 5732066
    Abstract: An optical record carrier and methods and apparatuses for recording and reproducing an information on and from said optical recording carrier, whereby the effects of crosstalk from adjacent tracks is reduced, and stable tracing control is possible, is achieved. A recording track to which information divided into sector units is recorded is formed in a spiral or concentric pattern on the surface of the optical record carrier. Each sector further comprises sixty frames. Each frame comprises a re-sync pattern, frame address, data, and postamble fields. Identification information identifying the sector location of the information is recorded to the data block of the first frame. The user data is recorded after the data is scrambled using a value generated by a fifteen-stage maximum-length sequence generator based on the value of this identification information.
    Type: Grant
    Filed: April 3, 1996
    Date of Patent: March 24, 1998
    Assignees: Matsushita Electric Industrial Co., Ltd., Kabushiki Kaisha Toshiba
    Inventors: Mitsurou Moriya, Shin-ichi Tanaka, Koichi Hirayama
  • Patent number: 5726969
    Abstract: The optical recording medium of this invention includes: a first substrate having a first information surface; a semitransparent reflection film formed on the first information surface of the first substrate; a second substrate having a second information surface; a reflection film formed on the second information surface of the second substrate; and an adhesive layer for adhering the first substrate and the second substrate so that the first information surface and the second information surface face each other, wherein the thickness of the first substrate is 0.56 mm or more, the thickness of the adhesive layer is 30 .mu.m or more, and the total thickness of the first substrate and the adhesive layer is 0.68 mm or less.
    Type: Grant
    Filed: December 22, 1995
    Date of Patent: March 10, 1998
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Mitsurou Moriya, Shin-ichi Tanaka, Yasuhiro Sugihara, Hiroshi Taniguchi, Michiyoshi Nagashima
  • Patent number: 5111265
    Abstract: The collector-top type transistor according to the present invention has at least principal semiconductor layers of an emitter layer, tunnel barrier layers having electron affinities smaller than those of the emitter and a base, the base layer, and a collector layer formed in the above-mentioned order on a semiconductor substrate in which the injection of the minority carriers from the emitter to the base is controlled by the tunneling mechanism via the tunnel barrier layer where the film thickness of the tunnel barrier layer in the extrinsic transistor region is regulated to be larger than that in the intrinsic transistor region.
    Type: Grant
    Filed: December 5, 1989
    Date of Patent: May 5, 1992
    Assignee: NEC Corporation
    Inventor: Shin-Ichi Tanaka
  • Patent number: 4958208
    Abstract: There is disclosed a heterojunction bipolar transistor comprising an emitter region having a first conductivity type, a base region having a second conductivity type opposite to the first conductivity type, and a collector region having a graded collector section formed of a first compound semiconductor material and a collector contact section formed of a second compound semiconductor material of the first conductivity type, and an emitter-base junction, a base-collector junction and an abrupt potential discontinuity are formed between the emitter region and the base region, between the base region and the graded collector section and between the graded collector section and the collector contact section, respectively, wherein the first compound semiconductor material is increased in bandgap from the base-collector junction toward the collector contact section and the second semiconductor material is smaller in bandgap at the abrupt junction than the first semiconductor material, so that the potential differe
    Type: Grant
    Filed: August 8, 1988
    Date of Patent: September 18, 1990
    Assignee: NEC Corporation
    Inventor: Shin-Ichi Tanaka
  • Patent number: 4929997
    Abstract: For improvement in operation speed, there is provided a heterojunction bipolar transistor comprising, (a) an emitter region formed of a first semiconductor material of a first conductivity type, (b) a base region formed of a second semiconductor material of a second conductivity type opposite to the first conductivity type and forming a first junction together with the emitter region, and (c) a collector region formed of a third semiconductor material of the first conductivity type and forming a second junction together with the base region, the heterojunction bipolar transistor has a plurality of abrupt potential discontinuities including first and second abrupt potential discontinuities produced in succession to provide kinetic energies to a carrier injected from the emitter region, respectively, and the first abrupt potential discontinuity is produced at one of the first and second junctions, thereby allowing the carrier to move over a distance longer than a mean free path of the carrier in the ballistic m
    Type: Grant
    Filed: December 22, 1987
    Date of Patent: May 29, 1990
    Assignee: NEC Corporation
    Inventors: Kazuhiko Honjo, Shin-Ichi Tanaka
  • Patent number: 4403030
    Abstract: There is disclosed a photosensitive lithographic printing plate material comprising a photosensitive layer having a slip sheet laid on the surface thereof, said slip sheet comprising natural pulp, 5 to 50% by weight of polyolefinic synthetic pulp and 0.2 to 2.0% by weight of an alkali metal halide.
    Type: Grant
    Filed: December 2, 1981
    Date of Patent: September 6, 1983
    Assignees: Mitsubishi Chemical Industries Limited, Konishiroku Photo Industry Co., Ltd.
    Inventors: Konoe Miura, Shin-ichi Tanaka, Hiroshi Kojima, Takeshi Tanaka, Osamu Matsushita