Patents by Inventor Shin Kikuchi

Shin Kikuchi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9362326
    Abstract: An image capturing apparatus having pixels is provided. Each pixel includes a photoelectric conversion unit including a charge accumulation region, an output unit configured to output a signal based on a potential of a node electrically connected to the charge accumulation region, and a connection unit configured to electrically connect a capacitance to the node. The charge accumulation region includes a first portion and a second portion. Charge is configured to be first accumulated in the first portion, and, after the first portion is saturated, be accumulated in the second portion. The output unit is configured to output a first signal based on the potential of the node before the capacitance is connected thereto, and, then a second signal based on the potential of the node after the capacitance is connected thereto.
    Type: Grant
    Filed: November 20, 2015
    Date of Patent: June 7, 2016
    Assignee: Canon Kabushiki Kaisha
    Inventor: Shin Kikuchi
  • Publication number: 20160156870
    Abstract: A solid-state imaging device includes a plurality of pixels each including a photoelectric converting element and an amplifier unit for outputting a signal based on charges generated by the photoelectric converting element, a signal line connected to the plurality of pixels, a second line arranged at a position adjacent to the signal line, and a buffer unit connected to the signal line. The buffer unit buffers the signal at to the signal line, and outputs a signal having a same phase as that of the signal to the second line.
    Type: Application
    Filed: November 2, 2015
    Publication date: June 2, 2016
    Inventor: Shin Kikuchi
  • Publication number: 20160079298
    Abstract: An image capturing apparatus having pixels is provided. Each pixel includes a photoelectric conversion unit including a charge accumulation region, an output unit configured to output a signal based on a potential of a node electrically connected to the charge accumulation region, and a connection unit configured to electrically connect a capacitance to the node. The charge accumulation region includes a first portion and a second portion. Charge is configured to be first accumulated in the first portion, and, after the first portion is saturated, be accumulated in the second portion. The output unit is configured to output a first signal based on the potential of the node before the capacitance is connected thereto, and, then a second signal based on the potential of the node after the capacitance is connected thereto.
    Type: Application
    Filed: November 20, 2015
    Publication date: March 17, 2016
    Inventor: Shin Kikuchi
  • Patent number: 9281477
    Abstract: To provide a resistance change element which does not require a forming process and enables reduction of power consumption and miniaturization of the element, and to provide a method for producing it. A resistance change element 1 according to an embodiment of the present invention includes a bottom electrode layer 3, a top electrode layer 5 and an oxide semiconductor layer 4. The oxide semiconductor layer 4 has a first metal oxide layer 41 and a second metal oxide layer 42. The first metal oxide layer 41 is formed between the bottom electrode layer 3 and the top electrode layer 5, and in ohmic contact with the bottom electrode layer 3. The second metal oxide layer 42 is formed between the first metal oxide layer 41 and the top electrode layer 5, and in ohmic contact with the top electrode layer 5.
    Type: Grant
    Filed: June 17, 2012
    Date of Patent: March 8, 2016
    Assignee: ULVAC, INC.
    Inventors: Yutaka Nishioka, Kazumasa Horita, Natsuki Fukuda, Shin Kikuchi, Koukou Suu
  • Patent number: 9269903
    Abstract: [Object] To provide a method and an apparatus for manufacturing a variable resistance element by which a metal oxide layer having a desired resistivity can be precisely formed. [Solving Means] The method of manufacturing the variable resistance element according to an embodiment of the present invention includes a step of forming a first metal oxide having a first resistivity and a step of forming a second metal oxide having a second resistivity different from the first resistivity. The first metal oxide is formed on a substrate by sputtering, while sputtering a first target made of an oxide of metal, a second target made of the metal with a first power. The second metal oxide layer is formed on the first metal oxide layer by sputtering the second target with a second power different from the first power while sputtering the first target.
    Type: Grant
    Filed: June 7, 2012
    Date of Patent: February 23, 2016
    Assignee: ULVAC, INC.
    Inventors: Yutaka Nishioka, Kazumasa Horita, Natsuki Fukuda, Shin Kikuchi, Youhei Ogawa, Koukou Suu
  • Publication number: 20160050381
    Abstract: Provided is an imaging apparatus, including: a vertical scanning circuit configured to output the reset signal and the image signal sequentially from each of a plurality of pixels by selecting the plurality of pixels sequentially; and an amplifier unit configured to output a plurality of image signals obtained by amplifying one image signal that is output from one of the plurality of pixels at a plurality of gains including a first gain and a second gain, in which, in a reading period, which is a period between selection of a first pixel by the vertical scanning circuit out of the plurality of pixels and subsequent selection of a second pixel out of the plurality of pixels, a number of times the amplifier unit is reset is less than a number of the plurality of amplified image signals.
    Type: Application
    Filed: July 30, 2015
    Publication date: February 18, 2016
    Inventors: Tomoya Onishi, Shin Kikuchi
  • Patent number: 9257460
    Abstract: An image capturing apparatus having pixels is provided. Each pixel includes a photoelectric conversion unit including a charge accumulation region, an output unit configured to output a signal based on a potential of a node electrically connected to the charge accumulation region, and a connection unit configured to electrically connect a capacitance to the node. The charge accumulation region includes a first portion and a second portion. Charge is configured to be first accumulated in the first portion, and, after the first portion is saturated, be accumulated in the second portion. The output unit is configured to output a first signal based on the potential of the node before the capacitance is connected thereto, and, then a second signal based on the potential of the node after the capacitance is connected thereto.
    Type: Grant
    Filed: August 2, 2013
    Date of Patent: February 9, 2016
    Assignee: Canon Kabushiki Kaisha
    Inventor: Shin Kikuchi
  • Patent number: 9124833
    Abstract: A solid-state imaging apparatus includes a pixel array, an effective signal line, a dummy pixel, a dummy signal line, and a processing unit. The effective pixels in the pixel array include a photoelectric converter, a charge-voltage converter, and an output unit. The dummy pixel includes a charge-voltage that has the same configuration as the charge-voltage converter of the effective pixel, and an output unit. A shortest distance between the charge-voltage converter of the dummy pixel and the effective signal line is longer than a shortest distance between the charge-voltage converter of the dummy pixel and the dummy signal line.
    Type: Grant
    Filed: August 8, 2013
    Date of Patent: September 1, 2015
    Assignee: Canon Kabushiki Kaisha
    Inventors: Ginjiro Toyoguchi, Shin Kikuchi
  • Patent number: 9113103
    Abstract: A solid-state imaging apparatus includes a pixel array in which a plurality of pixels are arranged, wherein the pixel array has a region formed from one of an electrical conductor and a semiconductor to which a fixed electric potential is supplied, each pixel includes a photoelectric converter, a charge-voltage converter which converts charges generated by the photoelectric converter into a voltage, and an amplification unit which amplifies a signal generated by the charge-voltage converter by a positive gain and outputs the amplified signal to an output line, and the output line comprising a shielding portion arranged to shield at least part of the charge-voltage converter with respect to the region.
    Type: Grant
    Filed: December 11, 2014
    Date of Patent: August 18, 2015
    Assignee: Canon Kabushiki Kaisha
    Inventors: Takashi Matsuda, Shin Kikuchi, Toru Koizumi
  • Patent number: 9105553
    Abstract: There is provided a solid-state imaging apparatus that can prevent degradation of image quality. The solid-state imaging apparatus includes a plurality of pixels (1) including a photoelectric conversion element that performs photoelectric conversion; a signal line (6) to which the plurality of pixels output signals; and a first constant current circuit configured to supply a constant current to the signal line, wherein the first constant current circuit has a first transistor (5) having a drain or collector node connected to the signal line, and a first resistor (101) connected between a reference voltage node and a source or emitter node of the first transistor.
    Type: Grant
    Filed: November 16, 2012
    Date of Patent: August 11, 2015
    Assignee: Canon Kabushiki Kaisha
    Inventor: Shin Kikuchi
  • Publication number: 20150181140
    Abstract: Provided is an imaging device, an imaging system, and a driving method of the imaging device. A signal of difference between a photogenerated signal of a first pixel which is an effective pixel, and a reference signal of a second pixel which is an effective pixel, is obtained.
    Type: Application
    Filed: December 22, 2014
    Publication date: June 25, 2015
    Inventors: Tomoya Onishi, Shin Kikuchi
  • Patent number: 9007501
    Abstract: A solid-state imaging apparatus includes a pixel array in which a plurality of pixels are arranged, wherein the pixel array has a region formed from one of an electrical conductor and a semiconductor to which a fixed electric potential is supplied, each pixel includes a photoelectric converter, a charge-voltage converter which converts charges generated by the photoelectric converter into a voltage, and an amplification unit which amplifies a signal generated by the charge-voltage converter by a positive gain and outputs the amplified signal to an output line, and the output line comprising a shielding portion arranged to shield at least part of the charge-voltage converter with respect to the region.
    Type: Grant
    Filed: June 14, 2011
    Date of Patent: April 14, 2015
    Assignee: Canon Kabushiki Kaisha
    Inventors: Takashi Matsuda, Shin Kikuchi, Toru Koizumi
  • Publication number: 20150092095
    Abstract: A solid-state imaging apparatus includes a pixel array in which a plurality of pixels are arranged, wherein the pixel array has a region formed from one of an electrical conductor and a semiconductor to which a fixed electric potential is supplied, each pixel includes a photoelectric converter, a charge-voltage converter which converts charges generated by the photoelectric converter into a voltage, and an amplification unit which amplifies a signal generated by the charge-voltage converter by a positive gain and outputs the amplified signal to an output line, and the output line comprising a shielding portion arranged to shield at least part of the charge-voltage converter with respect to the region.
    Type: Application
    Filed: December 11, 2014
    Publication date: April 2, 2015
    Inventors: Takashi Matsuda, Shin Kikuchi, Toru Koizumi
  • Patent number: 8970756
    Abstract: A solid-state imaging apparatus includes a pixel array in which a plurality of pixels are arranged, wherein the pixel array has a region formed from one of an electrical conductor and a semiconductor to which a fixed electric potential is supplied, each pixel includes a photoelectric converter, a charge-voltage converter which converts charges generated by the photoelectric converter into a voltage, and an amplification unit which amplifies a signal generated by the charge-voltage converter by a positive gain and outputs the amplified signal to an output line, and the output line comprising a shielding portion arranged to shield at least part of the charge-voltage converter with respect to the region.
    Type: Grant
    Filed: June 14, 2011
    Date of Patent: March 3, 2015
    Assignee: Canon Kabushiki Kaisha
    Inventors: Takashi Matsuda, Shin Kikuchi, Toru Koizumi
  • Publication number: 20150035013
    Abstract: An image pickup device according to the present invention is an image pickup device in which a plurality of pixel are arranged in a semiconductor substrate. Each of the plurality of pixels includes a photoelectric conversion element, a floating diffusion (FD) region, a transfer gate that transfers charges in the first semiconductor region to the FD region, and an amplification transistor whose gate is electrically connected to the FD region. The photoelectric conversion element has an outer edge which has a recessed portion in plan view, a source region and a drain region of the amplification transistor are located in the recessed portion, and the FD region is surrounded by the photoelectric conversion region or is located in the recessed portion in plan view.
    Type: Application
    Filed: October 15, 2014
    Publication date: February 5, 2015
    Inventors: Kazuaki Tashiro, Shin Kikuchi
  • Patent number: 8937672
    Abstract: A solid-state image sensor including a wiring portion which includes a first line, a second line and a control line, in first to third regions arranged sequentially, wherein the first line includes a first pattern in a first layer in the first and second regions and a second pattern in a second layer in the third region, and these patterns are connected each other between the second region and the third region, the second line includes a third pattern in the second layer in the first region and a fourth pattern in the first layer in the second and third regions, the these patterns are connected each other between the first region and the second region, and the control line includes a pattern in the second layer in the second region, intersecting with the first pattern and the fourth pattern.
    Type: Grant
    Filed: July 3, 2013
    Date of Patent: January 20, 2015
    Assignee: Canon Kabushiki Kaisha
    Inventors: Hirofumi Totsuka, Shin Kikuchi
  • Patent number: 8921900
    Abstract: A solid-state imaging device includes a photoelectric conversion unit that has a charge accumulation region and is configured to accumulate a charge that is generated in accordance with incident light in the charge accumulation region, and a transfer unit configured to transfer the charge accumulated in the charge accumulation region from the charge accumulation region. A potential distribution having a plurality of steps is formed in the charge accumulation region, and the further away from the transfer unit a step of the plurality of steps is, the greater the magnitude of the step is.
    Type: Grant
    Filed: June 14, 2013
    Date of Patent: December 30, 2014
    Assignee: Canon Kabushiki Kaisha
    Inventors: Satoko Iida, Ginjiro Toyoguchi, Shin Kikuchi
  • Patent number: 8896029
    Abstract: A solid state image pickup device which can prevent color mixture by using a layout of a capacitor region provided separately from a floating diffusion region and a camera using such a device are provided. A photodiode region is a rectangular region including a photodiode. A capacitor region includes a carrier holding unit and is arranged on one side of the rectangle of the photodiode region as a region having a side longer than the one side. In a MOS unit region, an output unit region including an output unit having a side longer than the other side which crosses the one side of the rectangle of the photodiode region is arranged on the other side. A gate region and the FD region are arranged between the photodiode region and the capacitor region.
    Type: Grant
    Filed: January 29, 2013
    Date of Patent: November 25, 2014
    Assignee: Canon Kabushiki Kaisha
    Inventors: Toru Koizumi, Akira Okita, Masanori Ogura, Shin Kikuchi, Tetsuya Itano
  • Patent number: 8872239
    Abstract: An image pickup device according to the present invention is an image pickup device in which a plurality of pixel are arranged in a semiconductor substrate. Each of the plurality of pixels includes a photoelectric conversion element, a floating diffusion (FD) region, a transfer gate that transfers charges in the first semiconductor region to the FD region, and an amplification transistor whose gate is electrically connected to the FD region. The photoelectric conversion element has an outer edge which has a recessed portion in plan view, a source region and a drain region of the amplification transistor are located in the recessed portion, and the FD region is surrounded by the photoelectric conversion region or is located in the recessed portion in plan view.
    Type: Grant
    Filed: December 21, 2012
    Date of Patent: October 28, 2014
    Assignee: Canon Kabushiki Kaisha
    Inventors: Kazuaki Tashiro, Shin Kikuchi
  • Patent number: 8836833
    Abstract: A solid-state imaging apparatus has a pixel array in which a plurality of pixels are arranged to form a plurality of rows and a plurality of columns, and a plurality of column signal lines are arranged, wherein each of the plurality of pixels includes a photoelectric converter including a first well formed in a semiconductor substrate and having a first conductivity type, and an impurity region arranged in the first well and having a second conductivity type different from the first conductivity type, and an in-pixel readout circuit which outputs, to the column signal line, a signal corresponding to charges generated in the photoelectric converter, the in-pixel readout circuit including a circuit element arranged in a second well having the first conductivity type, and wherein the first well and the second well are isolated by a semiconductor region having the second conductivity type.
    Type: Grant
    Filed: June 14, 2011
    Date of Patent: September 16, 2014
    Assignee: Canon Kabushiki Kaisha
    Inventors: Yuichiro Yamashita, Yasuo Yamazaki, Masaru Fujimura, Shin Kikuchi, Shoji Kono, Shinichiro Shimizu, Yu Arishima