Patents by Inventor Shingo Nakashima
Shingo Nakashima has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240164690Abstract: An aspect of the present invention is a state estimation device including a cardiac state time series acquisition unit that acquires a cardiac state time series that is a time series of a cardiac state quantity that is a quantity indicating a state of a heart as an estimation target, and a cardiac state estimation unit that estimates a state of the heart as the estimation target based on an occurrence time of out-of-range data, using, as the out-of-range data, a non-responsive period sample whose value is outside a threshold region of processing determined according to a distribution of the non-responsive period sample among non-responsive period samples that are non-responsive period samples among samples of the cardiac state time series acquired by the cardiac state time series acquisition unit.Type: ApplicationFiled: March 26, 2021Publication date: May 23, 2024Applicant: NIPPON TELEGRAPH AND TELEPHONE CORPORATIONInventors: Takayuki OGASAWARA, Shingo TSUKADA, Kentaro TANAKA, Hiroshi NAKASHIMA, Masumi YAMAGUCHI, Toichiro GOTO
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Publication number: 20240145112Abstract: Conductive polymer fibers 10, in which a conductor 12 containing a conductive polymer impregnates and/or adheres to base fibers 11, and the aforementioned conductive polymer is PEDOT-PSS.Type: ApplicationFiled: October 30, 2023Publication date: May 2, 2024Applicant: NIPPON TELEGRAPH AND TELEPHONE CORPORATIONInventors: Shingo TSUKADA, Hiroshi NAKASHIMA, Akiyoshi SHIMADA, Koji SUMITOMO, Keiichi TORIMITSU
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Patent number: 11935848Abstract: Disclosed is a package for a semiconductor device including a semiconductor die. The package includes a base member, a side wall, first and second conductive films, and first and second conductive leads. The base member has a conductive main surface including a region that mounts the semiconductor die. The side wall surrounds the region and is made of a dielectric. The side wall includes first and second portions. The first and second conductive films are provided on the first and second portions, respectively and are electrically connected to the semiconductor die. The first and second conductive leads are conductively bonded to the first and second conductive films, respectively. At least one of the first and second portions includes a recess in its back surface facing the base member, and the recess defines a gap between the at least one of the first and second portions below the corresponding conductive film and the base member.Type: GrantFiled: November 10, 2022Date of Patent: March 19, 2024Assignee: SUMITOMO ELECTRIC DEVICE INNOVATIONS, INC.Inventors: Ikuo Nakashima, Shingo Inoue
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Patent number: 11499449Abstract: A gas turbine module includes a gas turbine that has a gas turbine rotor and a turbine shell; an inlet plenum that is connected to an inlet of the gas turbine; an exhaust plenum that is connected to an exhaust of the gas turbine; an enclosure that covers the gas turbine; and a common base on which the gas turbine, the inlet plenum, the exhaust plenum, and the enclosure are mounted. When moving the gas turbine, the gas turbine module is moved together.Type: GrantFiled: November 27, 2020Date of Patent: November 15, 2022Assignee: MITSUBISHI HEAVY INDUSTRIES, LTD.Inventors: Yosuke Oba, Shingo Nakashima
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Publication number: 20210172342Abstract: A gas turbine module includes a gas turbine that has a gas turbine rotor and a turbine shell; an inlet plenum that is connected to an inlet of the gas turbine; an exhaust plenum that is connected to an exhaust of the gas turbine; an enclosure that covers the gas turbine; and a common base on which the gas turbine, the inlet plenum, the exhaust plenum, and the enclosure are mounted. When moving the gas turbine, the gas turbine module is moved together.Type: ApplicationFiled: November 27, 2020Publication date: June 10, 2021Inventors: Yosuke OBA, Shingo NAKASHIMA
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Patent number: 10583036Abstract: In a topical adhesive skin patch provided with a support and a base material layer laminated to one or both sides of the support, or in a topical adhesive skin patch intended to be used by placing only a gel sheet against the skin surface, the base material layer or gel sheet includes an oil-in-water type gel base containing at least water, oil, an emulsifier, and a water-absorbent polymer, such that prior to application to the skin surface, the base material layer or gel sheet is opaque due to emulsification of the base material layer or gel sheet, and subsequent to application to the skin surface, moisture contained in the base material layer or gel sheet gradually evaporates causing the opacity of the base material layer or gel sheet to decline over time, so that decline in opacity over time can be visually ascertained.Type: GrantFiled: December 13, 2013Date of Patent: March 10, 2020Assignee: KANAE TECHNOS CO., LTD.Inventors: Shingo Nakashima, Kazuhiro Yagyu
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Patent number: 10474173Abstract: A voltage regulator is equipped with the first and the second source-grounded amplifier circuits connected to an output terminal of a differential amplifier circuit; a phase compensation circuit having a resistor part and a capacitor part, and connected between an output terminal of the first source-grounded amplifier circuit and an output terminal of the second source-grounded amplifier circuit; and an output transistor connected to the output terminal of the second source-grounded amplifier circuit. At least one of the resistor part and the capacitor part of the phase compensation circuit has a filter.Type: GrantFiled: August 7, 2018Date of Patent: November 12, 2019Assignee: ABLIC INC.Inventor: Shingo Nakashima
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Publication number: 20190050008Abstract: A voltage regulator is equipped with the first and the second source-grounded amplifier circuits connected to an output terminal of a differential amplifier circuit; a phase compensation circuit having a resistor part and a capacitor part, and connected between an output terminal of the first source-grounded amplifier circuit and an output terminal of the second source-grounded amplifier circuit; and an output transistor connected to the output terminal of the second source-grounded amplifier circuit. At least one of the resistor part and the capacitor part of the phase compensation circuit has a filter.Type: ApplicationFiled: August 7, 2018Publication date: February 14, 2019Inventor: Shingo NAKASHIMA
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Publication number: 20150335471Abstract: In a topical adhesive skin patch provided with a support and a base material layer laminated to one or both sides of the support, or in a topical adhesive skin patch intended to be used by placing only a gel sheet against the skin surface, the base material layer or gel sheet includes an oil-in-water type gel base containing at least water, oil, an emulsifier, and a water-absorbent polymer, such that prior to application to the skin surface, the base material layer or gel sheet is opaque due to emulsification of the base material layer or gel sheet, and subsequent to application to the skin surface, moisture contained in the base material layer or gel sheet gradually evaporates causing the opacity of the base material layer or gel sheet to decline over time, so that decline in opacity over time can be visually ascertained.Type: ApplicationFiled: December 13, 2013Publication date: November 26, 2015Inventors: Shingo NAKASHIMA, Kazuhiro YAGYU
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Publication number: 20150108957Abstract: A voltage generation circuit supplies an internal power supply voltage to an internal circuit via an output terminal and includes a regulator, a second drive element, and a control circuit The regulator includes a first drive element disposed between an external power supply VDD (first power supply) and an output terminal, and supplies a voltage based on a reference voltage to the output voltage by controlling the first drive element. The second drive element is disposed between the external power supply VDD and the output terminal, and supplies a voltage of the external power supply VDD to the output terminal when activated. When a voltage of the external power supply is a previously set detection voltage value or less, the control circuit activates the first and the second drive element, and when the voltage of the external power supply exceeds the detection voltage value, deactivates the second drive element.Type: ApplicationFiled: December 22, 2014Publication date: April 23, 2015Inventor: Shingo Nakashima
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Patent number: 8970189Abstract: A voltage generation circuit supplies an internal power supply voltage to an internal circuit via an output terminal and includes a regulator, a second drive element, and a control circuit. The regulator includes a first drive element disposed between an external power supply VDD (first power supply) and an output terminal, and supplies a voltage based on a reference voltage to the output voltage by controlling the first drive element. The second drive element is disposed between the external power supply VDD and the output terminal, and supplies a voltage of the external power supply VDD to the output terminal when activated. When a voltage of the external power supply is a previously set detection voltage value or less, the control circuit activates the first and the second drive element, and when the voltage of the external power supply exceeds the detection voltage value, deactivates the second drive element.Type: GrantFiled: August 9, 2012Date of Patent: March 3, 2015Assignee: Renesas Electronics CorporationInventor: Shingo Nakashima
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Patent number: 8519692Abstract: An output voltage of a voltage regulator is set to within a prescribed voltage range in a short time. The voltage regulator comprises: an amplifier (AMP) that amplifies a difference between a reference voltage and a voltage proportional to an output voltage; an NMOS transistor (MN1) that has a control terminal connected to an output terminal of the amplifier (AMP) and that drops a power supply voltage to output an output voltage; a first capacitive element (C1) that has a first terminal connected to the output terminal of the amplifier (AMP) and a second terminal connected to ground; a second capacitive element (C2) that has a first terminal connected to the output terminal of the amplifier (AMP); and a control circuit (11) that, subsequent to supply of the power supply voltage, controls operation activation of the amplifier (AMP) and also supplies a drive signal to a second terminal of the second capacitive element (C2).Type: GrantFiled: December 8, 2009Date of Patent: August 27, 2013Assignee: Renesas Electronics CorporationInventor: Shingo Nakashima
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Patent number: 8438406Abstract: A semiconductor integrated circuit includes first and second external terminals receiving an external power supply voltage, an internal power supply line coupling to the first and second external terminals, a first transistor coupling between the first external terminal and the internal power supply line, a second transistor that is coupled between the second external terminal and the internal power supply line, a first monitor line coupling to a first node of the internal power supply line, a second monitor line coupling to a second node of the internal power supply line, the second node being different from the first node, and a controller coupling to the first and second monitor lines, the controller outputs a control signal corresponding to potentials of the first and second monitor lines to the first and second transistors.Type: GrantFiled: October 31, 2011Date of Patent: May 7, 2013Assignee: Renesas Electronics CorporationInventor: Shingo Nakashima
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Publication number: 20130038314Abstract: A voltage generation circuit supplies an internal power supply voltage to an internal circuit via an output terminal and includes a regulator, a second drive element, and a control circuit. The regulator includes a first drive element disposed between an external power supply VDD (first power supply) and an output terminal, and supplies a voltage based on a reference voltage to the output voltage by controlling the first drive element. The second drive element is disposed between the external power supply VDD and the output terminal, and supplies a voltage of the external power supply VDD to the output terminal when activated. When a voltage of the external power supply is a previously set detection voltage value or less, the control circuit activates the first and the second drive element, and when the voltage of the external power supply exceeds the detection voltage value, deactivates the second drive element.Type: ApplicationFiled: August 9, 2012Publication date: February 14, 2013Inventor: Shingo NAKASHIMA
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Publication number: 20120119826Abstract: A semiconductor integrated circuit includes first and second external terminals receiving an external power supply voltage, an internal power supply line coupling to the first and second external terminals, a first transistor coupling between the first external terminal and the internal power supply line, a second transistor that is coupled between the second external terminal and the internal power supply line, a first monitor line coupling to a first node of the internal power supply line, a second monitor line coupling to a second node of the internal power supply line, the second node being different from the first node, and a controller coupling to the first and second monitor lines, the controller outputs a control signal corresponding to potentials of the first and second monitor lines to the first and second transistors.Type: ApplicationFiled: October 31, 2011Publication date: May 17, 2012Applicant: Renesas Electronics CorporationInventor: Shingo NAKASHIMA
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Patent number: 8065535Abstract: A semiconductor integrated circuit includes an external terminal input with an external power supply voltage, a plurality of field effect transistors connected between the external terminal and an internal power supply line and a control circuit input with potentials of spots where voltage drops from output points of the output transistors are substantially the same in the internal power supply line, and controlling the plurality of field effect transistors according to the potential being input.Type: GrantFiled: November 13, 2006Date of Patent: November 22, 2011Assignee: Renesas Electronics CorporationInventor: Shingo Nakashima
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Publication number: 20100148742Abstract: An output voltage of a voltage regulator is set to within a prescribed voltage range in a short time. The voltage regulator comprises: an amplifier (AMP) that amplifies a difference between a reference voltage and a voltage proportional to an output voltage; an NMOS transistor (MN1) that has a control terminal connected to an output terminal of the amplifier (AMP) and that drops a power supply voltage to output an output voltage; a first capacitive element (C1) that has a first terminal connected to the output terminal of the amplifier (AMP) and a second terminal connected to ground; a second capacitive element (C2) that has a first terminal connected to the output terminal of the amplifier (AMP); and a control circuit (11) that, subsequent to supply of the power supply voltage, controls operation activation of the amplifier (AMP) and also supplies a drive signal to a second terminal of the second capacitive element (C2).Type: ApplicationFiled: December 8, 2009Publication date: June 17, 2010Inventor: Shingo Nakashima
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Publication number: 20070126476Abstract: A semiconductor integrated circuit includes an external terminal input with an external power supply voltage, a plurality of field effect transistors connected between the external terminal and an internal power supply line and a control circuit input with potentials of spots where voltage drops from output points of the output transistors are substantially the same in the internal power supply line, and controlling the plurality of field effect transistors according to the potential being input.Type: ApplicationFiled: November 13, 2006Publication date: June 7, 2007Applicant: NEC ELECTRONICS CORPORATIONInventor: Shingo Nakashima
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Patent number: 5555762Abstract: A filling material such as a fatty acid is filled into a metallic pipe in a molten state. The metallic pipe is then bent at a room temperature in a condition in which the filling material is solidified. After the bending work has been finished, the filling material is melted and discharged out of the pipe. The filling material may be a mixture of a fatty acid and a powdery additive.Type: GrantFiled: March 29, 1995Date of Patent: September 17, 1996Assignees: Honda Giken Kogyo Kabushi Kaisha, Marubishi Yuha Kogyo Kabushiki KaishaInventors: Yoshiro Kawamura, Isao Manabe, Shingo Nakashima