Abstract: A medical information anonymizing system includes a processing circuitry. The processing circuitry acquires medical information generated in a format based on a communication standard for a medical image and including a medical image and supplementary information. The processing circuitry adds the anonymization reference information indicating an anonymizing method for anonymizing the medical information to the supplementary information in the medical information. The processing circuitry configured to receive the medical information in which the anonymization reference information is added to the supplementary information and, based on the anonymization reference information added to the medical information, anonymize at least one of the medical image and the supplementary information included in the medical information.

Abstract: A palpation support device according to an embodiment includes: a palpation data acquiring part configured to acquire a palpation data based on a plurality of pressure values applied to fingers of an examiner; and a diagnosis support information output part configured to output diagnosis support information based on the palpation data.

Abstract: A medical reporting assistance apparatus according to an embodiment includes an acquirer, an associator, and a generator. The acquirer is configured to acquire medical report data. The associator is configured to associate the medical report data with a report item. The generator is configured to associate generate output data that represents results of associations established by the associator.

Abstract: A medical information anonymizing system includes a processing circuitry. The processing circuitry acquires medical information generated in a format based on a communication standard for a medical image and including a medical image and supplementary information. The processing circuitry adds the anonymization reference information indicating an anonymizing method for anonymizing the medical information to the supplementary information in the medical information. The processing circuitry configured to receive the medical information in which the anonymization reference information is added to the supplementary information and, based on the anonymization reference information added to the medical information, anonymize at least one of the medical image and the supplementary information included in the medical information.

Abstract: A diagnostic reading request system includes: a request information creation unit which creates diagnostic reading request information by adding identification information to clinical image data collected by a medical image diagnostic device; a request information update unit which updates the diagnostic reading request information by adding determination image data having already acquired a diagnostic reading result thereof; a diagnostic reading result evaluation unit which performs, based on a new diagnostic reading result of the determination image data supplied from a diagnostic reading request destination facility, an evaluation of the diagnostic reading result in the diagnostic reading request destination facility; a diagnostic reading report creation unit which creates a diagnostic reading report based on the evaluation of the diagnostic reading result and the diagnostic reading result supplied from the diagnostic reading request destination facility; and a display unit which displays the diagnostic re

Abstract: A diagnostic reading request system includes: a request information creation unit which creates diagnostic reading request information by adding identification information to clinical image data collected by a medical image diagnostic device; a request information update unit which updates the diagnostic reading request information by adding determination image data having already acquired a diagnostic reading result thereof; a diagnostic reading result evaluation unit which performs, based on a new diagnostic reading result of the determination image data supplied from a diagnostic reading request destination facility, an evaluation of the diagnostic reading result in the diagnostic reading request destination facility; a diagnostic reading report creation unit which creates a diagnostic reading report based on the evaluation of the diagnostic reading result and the diagnostic reading result supplied from the diagnostic reading request destination facility; and a display unit which displays the diagnostic re

Abstract: The PDP has a front panel, and has a back panel with address electrodes formed thereon. Front panel has display electrodes including first electrodes and second electrodes formed on a front glass substrate, and a dielectric layer covering display electrodes. Further, the first electrodes and the dielectric layer include glass frit, which contains at least one of molybdenum oxide, magnesium oxide and cerium oxide, and also include a softening point exceeding 550° C. The above-described makeup suppresses a coloring phenomenon in the dielectric layer and the front glass substrate, thereby implementing a plasma display panel with a high luminance.

Abstract: A Plasma Display Panel includes a front panel and a rear panel. The front panel includes a display electrode and a dielectric layer on a glass substrate. The rear panel includes a barrier rib and a phosphor layer on a substrate. The front panel and the rear panel are arranged to face each other, and the peripheries thereof are sealed to form a discharge space therebetween. The display electrode is constituted of multiple layers including at least a metal electrode layer containing silver and a glass material. A content of bismuth oxide (Bi2O3) in the dielectric layer is in a range from 5% to 25% inclusive by weight, and a content of bismuth oxide (Bi2O3) in the glass material of the metal electrode layer is in range from 5% to 25% inclusive by weight.

Abstract: A Plasma Display Panel includes a front panel having a display electrode and a dielectric layer formed on a glass substrate; and a rear panel having an electrode, a barrier rib, and a phosphor layer formed on a substrate. The front panel and the rear panel are disposed facing each other and sealed together at peripheries thereof with discharge space provided therebetween. The display electrode has at least a metal bus electrode including a metal electrode layer containing silver and a glass material, and a black layer containing a black material and a glass material. The glass material of the metal electrode layer and the black layer includes bismuth oxide. An undercut amount of the metal bus electrode is 25 ?m or more.

Abstract: A method of manufacturing a PDP in accordance with the present invention is a method of manufacturing a PDP including a front panel having a display electrode, a light blocking layer and a dielectric layer formed on a glass substrate, and a rear panel having an electrode, a barrier rib, and a phosphor layer formed on a substrate, the front panel and the rear panel being disposed facing each other and sealed together at peripheries thereof with discharge space provided therebetween. The method includes forming the display electrode by at least a plurality of layers including metal electrode layer containing silver and a glass material, and a black layer containing a black material and a glass material; adding bismuth oxide to the dielectric layer in the content of 5% by weight or more and 25% by weight or less; and forming the dielectric layer by firing at a temperature ranging from 570° C. to 590° C.

Abstract: A plasma display panel (PDP) is made of front panel (2) and a rear panel. The front panel includes display electrodes (6), dielectric layer (8), and protective layer (8) that are formed on front glass substrate (3). The rear panel includes electrodes, barrier ribs, and phosphor layers that are formed on a rear glass substrate. The front panel and the rear panel are faced with each other, and the peripheries thereof are sealed to form a discharge space therebetween. Display electrodes (6) includes metal electrodes (4b, 5b) each containing at least silver and binding glass. The binding glass of black electrodes (41b, 51b) and white electrodes (42b, 52b) constituting metal bus electrodes (4b, 5b) contains at least bismuth oxide and has a softening point exceeding 550° C.

Abstract: A phase interpolator according to an embodiment of the present invention includes a first mixer group including two mixers which are provided with a clock “D0” having a delay equivalent to a phase difference of 0 degree with respect to a reference clock, and generate and output a clock “D0+2Dc” having a delay equivalent to a phase difference of 0 degree with respect to the reference clock and a delay produced by two mixers, a second mixer group including two mixers which are provided with the clock “D0” and a clock “D90” having a delay equivalent to a phase difference of 90 degrees with respect to the reference clock, and generate and output a clock “D45+2Dc” having a delay equivalent to a phase difference of 45 degrees with respect to the reference clock and a delay produced by two mixers, and at least one mixer which generates and outputs, by using any two of the clocks “D0”, “D90”, and “D45+2Dc”, a clock having a delay equivalent to a phase difference of a predetermined angle with respect to the reference

Abstract: The PDP has front panel (2), and a back panel with address electrodes formed thereon. Front panel (2) has display electrodes (6) including first electrodes (42b, 52b) and second electrodes (41b, 51b) formed on front glass substrate (3); and dielectric layer (8) covering display electrodes (6). Further, first electrodes (42b, 52b) and dielectric layer (8) include glass frit, which contains at least one of molybdenum oxide, magnesium oxide and cerium oxide; and bismuth oxide, with a softening point exceeding 550° C. The above-described makeup suppresses a coloring phenomenon in dielectric layer (8) and front glass substrate (3), thereby implementing a plasma display panel with a high luminance.

Abstract: According to the present invention, there is provided a semiconductor device comprising: a current driver which is connected to a power supply terminal, and supplies a predetermined current; a first wiring layer which is connected to an output terminal of said current driver; and a second wiring layer which is placed to oppose said first wiring layer via an insulating layer, and has a predetermined resistance value.

Abstract: A plasma display panel (PDP) is made of front panel (2) and a rear panel. The front panel includes display electrodes (6), dielectric layer (8), and protective layer (8) that are formed on front glass substrate (3). The rear panel includes electrodes, barrier ribs, and phosphor layers that are formed on a rear glass substrate. The front panel and the rear panel are faced with each other, and the peripheries thereof are sealed to form a discharge space therebetween. Display electrodes (6) includes metal electrodes (4b, 5b) each containing at least silver and binding glass. The binding glass of black electrodes (41b, 51b) and white electrodes (42b, 52b) constituting metal bus electrodes (4b, 5b) contains at least bismuth oxide and has a softening point exceeding 550° C.

Abstract: A semiconductor integrated circuit is disclosed, which includes a current output buffer circuit including a differential circuit, a variable impedance circuit, and a constant current source, wherein the current output buffer circuit is driven by a constant current supplied by the constant current source, an output impedance of the current output buffer circuit is controlled in accordance with a bit rate of differential transmission signal inputs inputted to the differential circuit so that a waveform of a signal output from the current output buffer circuit to a signal transmission line is controlled in accordance with the bit rate of the transmission signal inputs.

Abstract: A semiconductor integrated circuit for matching the resistance of a variable resistor, which is used as a terminating resistor or a reference of said terminating resistor, to the characteristic impedance of a transmission line, has a terminating resistor adjusting circuit that has a current circuit connected to a power supply, said variable resistor that is connected between said current circuit and the ground and receives a main current output from said current circuit, a comparator circuit that compares the potential of the variable resistor with a first reference potential and outputs a signal, and a control circuit that controls the resistance of said variable resistor based on the output signal of said comparator circuit; and an additional current adjusting circuit that is connected between said power supply and said variable resistor and outputs an additional current to said variable resistor according to an external signal determined by the resistance of an external parasitic resistor between said term

Abstract: A semiconductor integrated circuit for matching the resistance of a variable resistor, which is used as a terminating resistor or a reference of said terminating resistor, to the characteristic impedance of a transmission line, has a terminating resistor adjusting circuit that has a current circuit connected to a power supply, said variable resistor that is connected between said current circuit and the ground and receives a main current output from said current circuit, a comparator circuit that compares the potential of the variable resistor with a first reference potential and outputs a signal, and a control circuit that controls the resistance of said variable resistor based on the output signal of said comparator circuit; and an additional current adjusting circuit that is connected between said power supply and said variable resistor and outputs an additional current to said variable resistor according to an external signal determined by the resistance of an external parasitic resistor between said term

Abstract: A semiconductor device includes semiconductor substrate, a plurality of element forming regions formed on the semiconductor substrate, and an interconnect for connecting the plurality of element forming regions to one another. A concave portion whose upper surface is lower than that of the surfaces of the element forming regions connected by use of the interconnect is formed in the surface of the semiconductor substrate under the interconnect.

Abstract: According to the present invention, there is provided a semiconductor device comprising: a current driver which is connected to a power supply terminal, and supplies a predetermined current; a first wiring layer which is connected to an output terminal of said current driver; and a second wiring layer which is placed to oppose said first wiring layer via an insulating layer, and has a predetermined resistance value.