Abstract: An object of the present invention is to suppress the passage of bipolar current in a silicon carbide semiconductor device by reducing a voltage applied to a terminal well region during reflux operations. An SiC-MOSFET includes a plurality of first well regions, a second well region, a third well region in a surface layer of a drift layer, the first, second, and third well regions being of a second conductivity type. The third well region is provided on the side of the second well region opposite to the first well regions. A unit cell that includes the first well regions includes a unipolar diode. The SiC-MOSFET includes a source electrode connected to the unipolar diode and the ohmic electrode and not having ohmic connection with the second well region and the third well region.

Abstract: A semiconductor substrate according to the present invention includes a nitride semiconductor layer 203, an amorphous semiconductor layer 205 formed on one main surface side of the nitride semiconductor layer 203, a high-roughness layer 206 which is a semiconductor layer formed on the amorphous semiconductor layer 205 and has a surface roughness larger than the amorphous semiconductor layer 205, and a diamond layer 207 formed on the high-roughness layer 206. Damage to the nitride semiconductor layer can be reduced in forming the diamond layer on the nitride semiconductor layer and adhesion between the layers can be increased.

Abstract: A semiconductor substrate according to the present invention includes a nitride semiconductor layer 203, an amorphous semiconductor layer 205 formed on one main surface side of the nitride semiconductor layer 203, a high-roughness layer 206 which is a semiconductor layer formed on the amorphous semiconductor layer 205 and has a surface roughness larger than the amorphous semiconductor layer 205, and a diamond layer 207 formed on the high-roughness layer 206. Damage to the nitride semiconductor layer can be reduced in forming the diamond layer on the nitride semiconductor layer and adhesion between the layers can be increased.

Abstract: A magnetic field detection device including a magnetic body (magnetic flux guide) provided for adjusting a magnetic field to be applied to a magneto-resistance element. A shape of an on-substrate magnetic body in plan view is a tapered shape on one end portion side and a substantially funnel shape on another end portion side opposite the one end portion, the another end portion being larger in width than the one end portion, and a magneto-resistance element is disposed in front of an output-side end portion. In the on-substrate magnetic body, a contour of a tapered portion is not linear like a funnel, but has a curved shape in which a first curved portion protruding outward with a gentle curvature and a second curved portion protruding inward with a curvature similar to that of the first curved portion are continuously formed.

Abstract: A magnetic field detection device including a magnetic body (magnetic flux guide) provided for adjusting a magnetic field to be applied to a magneto-resistance element. A shape of an on-substrate magnetic body in plan view is a tapered shape on one end portion side and a substantially funnel shape on another end portion side opposite the one end portion, the another end portion being larger in width than the one end portion, and a magneto-resistance element is disposed in front of an output-side end portion. In the on-substrate magnetic body, a contour of a tapered portion is not linear like a funnel, but has a curved shape in which a first curved portion protruding outward with a gentle curvature and a second curved portion protruding inward with a curvature similar to that of the first curved portion are continuously formed.

Abstract: It is an object to provide a semiconductor device having a buried multilayer wiring structure in which generation of a resolution defect of a resist pattern is suppressed and generation of a defective wiring caused by the resolution defect is reduced. After a via hole (7) reaching an etching stopper film (4) is formed, annealing is carried out at 300 to 400° C. with the via hole (7) opened. As an annealing method, it is possible to use both a method using a hot plate and a method using a heat treating furnace. In order to suppress an influence on a lower wiring (20) which has been manufactured, heating is carried out for a short time of approximately 5 to 10 minutes by using the hot plate.

Abstract: It is an object to provide a semiconductor device having a buried multilayer wiring structure in which generation of a resolution defect of a resist pattern is suppressed and generation of a defective wiring caused by the resolution defect is reduced. After a via hole (7) reaching an etching stopper film (4) is formed, annealing is carried out at 300 to 400° C. with the via hole (7) opened. As an annealing method, it is possible to use both a method using a hot plate and a method using a heat treating furnace. In order to suppress an influence on a lower wiring (20) which has been manufactured, heating is carried out for a short time of approximately 5 to 10 minutes by using the hot plate.

Abstract: A plurality of interconnection layers arranged at the same level are connected by an anti-diffusion insulating layer in a lateral direction. Interconnection layers arranged at different levels are electrically connected through a plug portion in a vertical direction. A second interlayer film is arranged only at a region directly below the interconnection layer and connects the interconnection layer with the anti-diffusion insulating layer in the vertical direction. A hollow space or an interlayer film with a low dielectric constant of at most 2.5 is located laterally adjacent to each of the plurality of interconnection layers. Thus, a semiconductor device having a multilayer interconnection structure that can improve both the strength of the interconnection layers and the transmission speed of signals, and a method of manufacturing the semiconductor device can be obtained.

Abstract: A plasma processing apparatus includes a reaction chamber for processing a workpiece with plasma which is generated by using one or more gases, a gas supplying means which pulsatively supplies the gases to the reaction chamber, and an exhaust means for exhausting the reaction chamber, wherein a gas supplying direction by said gas supplying means is arranged to correspond with an exhausting direction by said exhausting means.

Abstract: A gas supply system for supplying a gas into a reaction chamber is provided with a pulse valve, a mass flow controller and a back pressure controller. The mass flow controller includes a flow meter and a variable flow control valve, and the back pressure controller includes a pressure gauge and a pressure control valve. The pulse valve, the mass flow controller and the back pressure controller are connected to a controller so that operations thereof are controlled by this controller.

Abstract: A gas supply system for supplying a gas into a reaction chamber is provided with a pulse valve, a mass flow controller and a back pressure controller. The mass flow controller includes a flow meter and a variable flow control valve, and the back pressure controller includes a pressure gauge and a pressure control valve. The pulse valve, the mass flow controller and the back pressure controller are connected to a controller so that operations thereof are controlled by this controller.