Abstract: A method for controlling a control apparatus such as a programmable controller which includes a CPU and special function modules. The CPU conducts sequence control and the special function modules perform control other than sequence control in accordance with commands from the CPU. Each instruction represents a normal or special instruction. Special instructions include a first symbol denoting a special function unit-corresponding instruction and a second symbol denotes a special function type (independent of memory addresses). Once the CPU identifies a special function instruction by identifying the first symbol, the CPU stores the contents of the instruction step into a multi-directional access memory of the special function unit. Thereafter, in one embodiment, the CPU generates an interrupt requesting the special function unit to execute this instruction.

Abstract: A master programmable controller is linked to one or more processing units by a network that enables communication to or from the units under system program control. The communication is based on data link instructions that are organized in blocks, as a series of a one or more data link instructions for corresponding units, and are accessed for execution in a sequence established by a sequence program, stored at the programmable controller. One or more of the data link instructions have a corresponding operation completion flag addressing instruction for specifying the address of a flag that is set where the respective operations of the data link instructions are complete. The efficient programming and execution of the sequence program is provided by assembling the data link instructions that define communications with one or more units into a group that is served by a single operation completion flag addressing instruction.

Abstract: A method and apparatus for debugging a sequence program by partially running the program by a programmable controller. The programmable controller includes memory to store the sequence program and memory to store partial run conditions comprising identity of a external device required for a partial run of the sequence program, a device access method and relevant data. An external i/o device interfaces with the programmable controller to store the partial run condition. The programmable controller includes a compare circuit for comparing the stored partial run conditions and the status of the program during a partial run. The comparison circuit outputs a signal which stops the run when the result of the sequence program operation is identical with the stored partial run conditions. The stop step and number of scans of the sequence program at the time the match is identified can be output for example, on a display.