Abstract: Provided is a polyfunctional vinyl aromatic copolymer having reactivity and solubility that can be used for manufacturing a copolymer rubber and a copolymer rubber material having processability, strength and homogeneity obtained therefrom. The polyfunctional vinyl aromatic copolymer includes: 0.5 mol % or more and 40 mol % or less of a structural unit (a) derived from a divinyl aromatic compound and 60 mol % or more and 99.5 mol % or less of a structural unit (b) derived from a monovinyl aromatic compound, in which at least some of the structural units (a) are a crosslinked structural unit (a2) represented by the following Formula (2) and a vinyl-group-containing structural unit (a1) represented by the following Formula (1): in the formulas, R1's independently represent an aromatic hydrocarbon group having 6 to 30 carbon atoms.

Abstract: Provided is a polyfunctional vinyl aromatic copolymer having reactivity and solubility that can be used for manufacturing a copolymer rubber and a copolymer rubber material having processability, strength and homogeneity obtained therefrom. The polyfunctional vinyl aromatic copolymer includes: 0.5 mol % or more and 40 mol % or less of a structural unit (a) derived from a divinyl aromatic compound and 60 mol % or more and 99.5 mol % or less of a structural unit (b) derived from a monovinyl aromatic compound, in which at least some of the structural units (a) are a crosslinked structural unit (a2) represented by the following Formula (2) and a vinyl-group-containing structural unit (a1) represented by the following Formula (1): in the formulas, R1's independently represent an aromatic hydrocarbon group having 6 to 30 carbon atoms.

Abstract: A novel soluble polyfunctional vinyl aromatic copolymer capable of yielding a cured product or molded body having improved heat resistance, compatibility, dielectric properties, wet heat reliability and resistance to thermal oxidative degradation. Disclosed herein is a soluble polyfunctional vinyl aromatic copolymer containing structural units derived from a divinyl aromatic compound (a), styrene (b), and a monovinyl aromatic compound (c) other than styrene. The copolymer includes structural units made up of an unsaturated hydrocarbon group represented by Formula (a1) and derived from the divinyl aromatic compound (a); and the copolymer includes, at terminals thereof, predetermined amounts of specific terminal groups having a vinyl group or a vinylene bond derived from monomers (a), (b), and (c). Also disclosed is a method for producing the copolymer.

Abstract: A novel soluble polyfunctional vinyl aromatic copolymer capable of yielding a cured product or molded body having improved heat resistance, compatibility, dielectric properties, wet heat reliability and resistance to thermal oxidative degradation. Disclosed herein is a soluble polyfunctional vinyl aromatic copolymer containing structural units derived from a divinyl aromatic compound (a), styrene (b), and a monovinyl aromatic compound (c) other than styrene. The copolymer includes structural units made up of an unsaturated hydrocarbon group represented by Formula (a1) and derived from the divinyl aromatic compound (a); and the copolymer includes, at terminals thereof, predetermined amounts of specific terminal groups having a vinyl group or a vinylene bond derived from monomers (a), (b), and (c). Also disclosed is a method for producing the copolymer.

Abstract: A row decoder for a semiconductor memory device is disclosed which includes a plurality of decoding circuits each driving a corresponding one of word lines in response to first and second control signals associated therewith. Each of the decoding circuits includes a first node supplied with the first control signal, a second node supplied with the second control signal, a first transistor connected between the first node and the corresponding word line and turned ON when the second control signal takes an active level, and a second transistor connected between the corresponding word line and a reference potential terminal and turned ON when the second control signal takes an inactive level.

Abstract: A sense amplifier circuit incorporated in an electrically programmable read only memory device comprises a differential amplification stage operative to develop a differential voltage level indicative of a read-out data bit for producing a large differential voltage signal, and an output stage having an output inverter variable in threshold level and responsive to the large differential voltage signal for producing an output data signal, and a controller responsive to the output data signal indicative of a previously accessed data bit for varying the threshold level of the output inverter so that the output inverter never produces a transient pulse between sequentially accessed data bits identical in logic level.

Abstract: A row address decoder and word line driver unit selectively drives a word line selected from one of a plurality sets of word lines, and comprises a plurality of row address decoders and word line driver sub-units for selecting a set of word lines and a plurality of address decoder sub-units for selecting a word line from the selected set of word lines, wherein a pair of p-channel enhancement type transfer transistors coupled between a selected row address decoder and word line driver unit and the selected word line are switched by a selected address decoder sub-unit for supplying a word line driving signal, the complementary word line driving signal switches an n-channel enhancement type first pull-down transistor coupled between the selected word line and a ground voltage line, and the selected address decoder sub-unit further switches an n-channel enhancement type second pull-down transistor, thereby charging to and discharging from the selected word line through the transistors operable in the saturation r

Abstract: A sense amplifier for a non-volatile semiconductor storage device includes a true and a complementary load circuit which are for holding the potentials of input signals and which have the current driving capability lower than that of each memory cell of the semiconductor storage device. These true and complementary load circuits are connected with a true and a complementary input terminal of the conventional sense amplifier. In accordance with the output logical value of the sense amplifier, if it is in the "H" level, the complementary load circuit is activated whereas if it is in the "L" level, the true load circuit is activated. In this way, the operation speed of the sense amplifier at a memory cell selecting operation can be effectively improved.

Abstract: A sense amplifier circuit is associated with at least one memory cell and comprises a series combination of a first p-channel type transistor and a second n-channel type transistor coupled between a source of positive voltage level and a first input node, a first negative feedback loop coupled between the first input node and the second n-channel type transistor, a series combination of a third p-channel type transistor and a fourth n-channel type transistor coupled between the source of positive voltage level and a second input node, a second negative feedback loop coupled between the second input node and the fourth n-channel type transistor, an output circuit coupled to the first and third n-channel type transistors in a current-mirror fashion and producing an output data signal, and first and second load elements respectively coupled between the first and second input nodes and a ground node, wherein each of the first and second load elements is smaller in conductance than the memory cell and restricts th

Abstract: A semiconductor memory device having a redundancy memory cell array is disclosed. UV-PROM's are employed as a programming means in the redundancy control section. A first impurity region is formed in the substrate and the control gate electrode of the UV-PROM is led out through the first impurity region. A second impurity region is formed in the substrate and crosses the first impurity region, and the floating gate electrode of the UV-PROM is covered by a metallic film which is contacted to the second impurity region.

Abstract: An electrically programmable read only memory including a plurality of memory cells each composed of a field effect transistor having a floating gate is disclosed. The memory is featured by a test circuit which has a first circuit responding to a first control signal to raise all word lines up to a programming voltage and a second circuit responding to a second control signal to raise all digit lines up to the programming voltage. It is thereby detected whether or not electrons injected into the floating gate of the programmed memory cell are carried away during a data programming operation period.