Patents by Inventor Shinichi Tachi

Shinichi Tachi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20060144518
    Abstract: A plasma processing apparatus includes a vacuum processing chamber having a pair of opposing electrodes for plasma generation, one electrode serving as a sample table for a sample including an insulator film. An electrostatic adsorption film is arranged at the sample table electrode to supply a thermal conductive gas between the film and the sample rear surface. A pressure reducing element is also provided. In addition, arrangements are provided to set a gas pressure within said vacuum processing chamber to 0.5 to 4.0 Pa and to apply a high frequency power of 30 MHz to 200 MHz between the electrodes. An electrode cover is disposed at the other electrode, and a clearance between the electrodes is 30 mm to 100 mm.
    Type: Application
    Filed: March 3, 2006
    Publication date: July 6, 2006
    Inventors: Tetsunori Kaji, Shinichi Tachi, Toru Otsubo, Katsuya Watanabe, Katsuhiko Mitani, Junichi Tanaka
  • Patent number: 7071114
    Abstract: A method and apparatus for dry etching changes at least one of the effective pumping speed of a vacuum chamber and the gas flow rate to alter the processing of an etching pattern side wall of a sample between first and second conditions. The first and second conditions include the presence or absence of a deposit film, or the presence, absence or shape of a taper angle. Various parameters for controlling the first and second conditions are contemplated.
    Type: Grant
    Filed: April 1, 2003
    Date of Patent: July 4, 2006
    Assignee: Hitachi, Ltd.
    Inventors: Takao Kumihashi, Kazunori Tsujimoto, Shinichi Tachi
  • Patent number: 6927173
    Abstract: Because of environmental pollution prevention laws, PFC (perfluorocarbon) and HFC (hydrofluorocarbon), both etching gases for silicon oxide and silicon nitride films, are expected to be subjected to limited use or become difficult to obtain in the future. An etching gas containing fluorine atoms is introduced into a plasma chamber. In a region where plasma etching takes place, the fluorine-containing gas plasma is made to react with solid-state carbon in order to produce molecular chemical species such as CF4, CF2, CF3 and C2F4 for etching. This method assures a high etch rate and high selectivity while keeping a process window wide.
    Type: Grant
    Filed: December 10, 2002
    Date of Patent: August 9, 2005
    Assignee: Renesas Technology Corp.
    Inventors: Masahito Mori, Shinichi Tachi, Kenetsu Yokogawa
  • Patent number: 6902683
    Abstract: A method of plasma-processing is provided which includes placing a sample on one of electrodes provided in a vacuum processing chamber and holding the sample onto the electrodes by an electrostatic attracting force. A processing gas is introduced into an environment in which said sample is placed, and the environment is evacuated to a pressure condition for processing said sample. The processing gas is then formed into a plasma under the pressure condition, the sample is processed by the plasma, and a pulse bias voltage having a pulse cycle of 0.1 ?m to 10 ?m is applied to the sample.
    Type: Grant
    Filed: May 5, 2000
    Date of Patent: June 7, 2005
    Assignee: Hitachi, Ltd.
    Inventors: Tetsunori Kaji, Shinichi Tachi, Toru Otsubo, Katsuya Watanabe, Katsuhiko Mitani, Junichi Tanaka
  • Publication number: 20050082006
    Abstract: A plasma processing apparatus includes a vacuum processing chamber having a pair of opposing electrodes for plasma generation, one electrode serving as a sample table for a sample including an insulator film. An electrostatic adsorption film is arranged at the sample table electrode to supply a thermal conductive gas between the film and the sample rear surface. A pressure reducing element is also provided. In addition, arrangements are provided to set a gas pressure within said vacuum processing chamber to 0.5 to 4.0 Pa and to apply a high frequency power of 30 MHz to 200 MHz between the electrodes. An electrode cover s disposed at the other electrode, and a clearance between the electrodes is 30 mm to 100 mm.
    Type: Application
    Filed: November 10, 2004
    Publication date: April 21, 2005
    Inventors: Tetsunori Kaji, Shinichi Tachi, Toru Otsubo, Katsuya Watanabe, Katsuhiko Mitani, Junichi Tanaka
  • Publication number: 20050074977
    Abstract: A method and apparatus for dry etching changes at least one of the effective pumping speed of a vacuum chamber and the gas flow rate to alter the processing of an etching pattern side wall of a sample between first and second conditions. The first and second conditions include the presence or absence of a deposit film, or the presence, absence or shape of a taper angle. Various parameters for controlling the first and second conditions are contemplated.
    Type: Application
    Filed: April 1, 2003
    Publication date: April 7, 2005
    Inventors: Takao Kumihashi, Kazunori Tsujimoto, Shinichi Tachi
  • Patent number: 6842658
    Abstract: Automatic generation of processing conditions will be provided, based on a database and process modeling by a computer equipped in semiconductor device fabrication equipment, by using input of wafer processing history including the thickness and quality. The computer equipped in semiconductor device fabrication equipment obtains the wafer processing and inspection results from a production line management computer in order to assist input of the process history. The computer in the fabrication equipment can be connected to computers in a fabrication equipment manufacturer on a communication network to automatically provide process conditions and maintenance schedule.
    Type: Grant
    Filed: February 26, 2001
    Date of Patent: January 11, 2005
    Assignee: Hitachi, Ltd.
    Inventors: Masaru Izawa, Masahito Mori, Nobuyuki Negishi, Shinichi Tachi
  • Publication number: 20040178180
    Abstract: A plasma processing apparatus includes a vacuum processing chamber having a pair of opposing electrodes for plasma generation, one electrode serving as a sample table for a sample including an insulator film. An electrostatic adsorption film is arranged at the sample table electrode to supply a thermal conductive gas between the film and the sample rear surface. A pressure reducing element is also provided. In addition, arrangements are provided to set a gas pressure within said vacuum processing chamber to 0.5 to 4.0 Pa and to apply a high frequency power of 30 MHz to 200 MHz between the electrodes. An electrode cover is disposed at the other electrode, and a clearance between the electrodes is 30 mm to 100 mm.
    Type: Application
    Filed: March 25, 2004
    Publication date: September 16, 2004
    Inventors: Tetsunori Kaji, Shinichi Tachi, Toru Otsubo, Katsuya Watanabe, Katsuhiko Mitani, Junichi Tanaka
  • Patent number: 6713401
    Abstract: Disclosed is a method for manufacturing a semiconductor device which efficiently carries out a process on a semiconductor substrate, such as dry etching, and cleaning for removing a foreign matter after the process. The method includes a step of removing a foreign matter by using both an electric action of a plasma generated by plasma generation means and a physical action caused by a frictional stress of a fast gas stream formed by a pad structure which is arranged close to a wafer surface.
    Type: Grant
    Filed: August 28, 2001
    Date of Patent: March 30, 2004
    Assignee: Hitachi, Ltd.
    Inventors: Kenetsu Yokogawa, Yoshinori Momonoi, Kazunori Tsujimoto, Shinichi Tachi
  • Publication number: 20040058554
    Abstract: In order to provide an etching method for silicone oxide film by fluorocarbon plasma in semiconductor production, which is superior in precise manufacturing and highly selective to resist and silicone nitride film, two kinds of electronic temperature regions are generated in plasma, and a generation ratio of CF2/F is controlled independently from a generation amount of ions by making areas of these two electronic temperature regions variable with a magnetic field gradient and a distance between a wafer and a wafer facing plane.
    Type: Application
    Filed: October 2, 2003
    Publication date: March 25, 2004
    Inventors: Masaru Izawa, Shinichi Tachi, Ken?apos;etsu Yokogawa, Nobuyuki Negishi, Naoyuki Kofuji, Naoshi Itabashi, Seiji Yamamoto, Kazue Takahashi
  • Patent number: 6643893
    Abstract: A dry cleaning device, wherein a pad is moved towards a surface of a wafer, cleaning gas is injected into a space formed between the pad and the wafer to generate a high-speed gas flow along the surface of the wafer whereby particles left on the surface of the wafer are removed with the high-speed gas flow. In addition, in order to assist this physical cleaning action, either a chemical or an electrical cleaning method such as a plasma additionally may be used.
    Type: Grant
    Filed: March 16, 2001
    Date of Patent: November 11, 2003
    Assignee: Hitachi, Ltd.
    Inventors: Yoshinori Momonoi, Kenetsu Yokogawa, Masaru Izawa, Shinichi Tachi
  • Patent number: 6629538
    Abstract: A method of dry cleaning surfaces of a semiconductor wafer includes the steps of placing a processed wafer in a vacuum environment and positioning a pad near each of a front surface and a back surface of the wafer. Cleaning gas is injected into a small clearance formed between each pad and the front and rear surfaces to generate a high-speed gas flow along the surface of the wafer. Particles left at the surfaces of the processed wafer are physically cleaned and removed with the high-speed gas flow. In order to assist this physical cleaning action, it is also possible to apply either a chemical cleaning method or an electrical cleaning method under application of plasma.
    Type: Grant
    Filed: March 20, 2001
    Date of Patent: October 7, 2003
    Assignee: Hitachi, Ltd.
    Inventors: Kenetsu Yokogawa, Yoshinori Momonoi, Masaru Izawa, Shinichi Tachi
  • Patent number: 6579154
    Abstract: The present invention provides a dry chemical-mechanical polishing method to perform etching in efficient manner. The dry chemical-mechanical polishing method comprises the steps of bringing surface of a polishing specimen retained on a specimen stand 114 into contact with a polishing tool while supplying plasma 106 from a plasma source, moving relative positions of the polishing specimen and the polishing tool and then polishing, and planarizing the surface of the polishing specimen, whereby diameter of the polishing specimen is increased to larger than diameter of the polishing tool, for instance, so that at least a part of the surface of the polishing specimen is exposed to an atmosphere of the plasma during polishing operation.
    Type: Grant
    Filed: June 7, 2001
    Date of Patent: June 17, 2003
    Assignee: Hitachi, Ltd.
    Inventors: Seiji Yamamoto, Kenetsu Yokogawa, Shinichi Tachi
  • Patent number: 6573190
    Abstract: A dry etching apparatus and method which can uniformly and stably generate a high-density plasma over a wide range, and can cope with increase of wafer diameter and making the pattern finer in etch processing of the fine pattern of a semiconductor device. The apparatus and method enables a magnitude of a magnetic field to be cyclically modulated when a substrate to be treated is etch processed. The cyclical modulation may be effected by cyclically modulating a coil current flowing to a solenoid coil.
    Type: Grant
    Filed: May 18, 2001
    Date of Patent: June 3, 2003
    Assignee: Hitachi, Ltd.
    Inventors: Masaru Izawa, Shinichi Tachi, Kenetsu Yokogawa, Nobuyuki Negishi, Naoyuki Kofuji
  • Publication number: 20030098288
    Abstract: Because of environmental pollution prevention laws, PFC (perfluorocarbon) and HFC (hydrofluorocarbon), both etching gases for silicon oxide and silicon nitride films, are expected to be subjected to limited use or become difficult to obtain in the future. An etching gas containing fluorine atoms is introduced into a plasma chamber. In a region where plasma etching takes place, the fluorine-containing gas plasma is made to react with solid-state carbon in order to produce molecular chemical species such as CF4, CF2, CF3 and C2F4 for etching. This method assures a high etch rate and high selectivity while keeping a process window wide.
    Type: Application
    Filed: December 10, 2002
    Publication date: May 29, 2003
    Inventors: Masahito Mori, Shinichi Tachi, Kenetsu Yokogawa
  • Patent number: 6562722
    Abstract: A method and apparatus for dry etching changes at least one of the effective pumping speed of a vacuum chamber and the gas flow rate to alter the processing of an etching pattern side wall of a sample between first and second conditions. The first and second conditions include the presence or absence of a deposit film, or the presence, absence or shape of a taper angle. Various parameters for controlling the first and second conditions are contemplated.
    Type: Grant
    Filed: December 21, 2001
    Date of Patent: May 13, 2003
    Assignee: Hitachi, Ltd.
    Inventors: Takao Kumihashi, Kazunori Tsujimoto, Shinichi Tachi
  • Patent number: 6551445
    Abstract: A parallel plate ECR plasma processing system is able to extend a plasma density region capable of keeping a continuous, uniform state. In this system, a first magnetic field-forming means formed of a solenoid coil and a second magnetic field-forming means are provided so that a the distribution of a direction of a magnetic line of flux on the surface of a planar plate is controlled by a combined magnetic field from the first and second magnetic field-forming means thereby controlling the distribution in degree of the interactions of the magnetic field and an electromagnetic wave. This control ensures the uniformity of a plasma under high density plasma formation conditions, thus enabling one to form a continuous plasma over a wide range of low to high densities. Thus, there can be realized a plasma processing system that ensures processing under wide plasma conditions including high-speed processing under high density conditions.
    Type: Grant
    Filed: September 19, 2000
    Date of Patent: April 22, 2003
    Assignee: Hitachi, Ltd.
    Inventors: Ken'etsu Yokogawa, Yoshinori Momonoi, Nobuyuki Negishi, Masaru Izawa, Shinichi Tachi
  • Patent number: 6511608
    Abstract: Because of environmental pollution prevention laws, PFC (perfluorocarbon) and HFC (hydrofluorocarbon), both etching gases for silicon oxide and silicon nitride films, are expected to be subjected to limited use or become difficult to obtain in the future. An etching gas containing fluorine atoms is introduced into a plasma chamber. In a region where plasma etching takes place, the fluorine-containing gas plasma is made to react with solid-state carbon in order to produce molecular chemical species such as CF4, CF2, CF3 and C2F4 for etching. This method assures a high etch rate and high selectivity while keeping a process window wide.
    Type: Grant
    Filed: September 14, 2000
    Date of Patent: January 28, 2003
    Assignee: Hitachi, Ltd.
    Inventors: Masahito Mori, Shinichi Tachi, Kenetsu Yokogawa
  • Patent number: 6506687
    Abstract: A technique of dry etching the surface of a wafer by using a dry etching apparatus in which the distance between a wafer and a surface facing the wafer is set to the half or less of the diameter of the wafer is disclosed. Even in the case of using, especially, a wafer having a large diameter, the incident amount of etching reaction by-products in the peripheral portion of the wafer and that in the center portion of the wafer are uniformed. Thus, a uniform etching process over the whole surface of the wafer can be realized.
    Type: Grant
    Filed: December 20, 2000
    Date of Patent: January 14, 2003
    Assignee: Hitachi, Ltd.
    Inventors: Masaru Izawa, Shinichi Tachi
  • Patent number: 6475918
    Abstract: An etching method capable of obtaining a fine fabricated shape, particularly, a vertical fabricated shape with less bowing upon fabrication of insulation films in the production of semiconductors, the method comprising controlling the incident amount of O, F or N radicals, gas flow rate or consumption amount of O, F and N on the inner wall surface with etching time to suppress excessive O, F and N which become excessive in the initial stage of etching, the method also including control for the flow rate or the consumption amount based on the result of measurement for plasmas during etching so as to obtain a stable etching shape. Since bowing can be reduced upon fabrication of insulation film hole and insulation film while maintaining the etching rate and the selectivity, finer semiconductor device can be produced easily.
    Type: Grant
    Filed: October 5, 2000
    Date of Patent: November 5, 2002
    Assignee: Hitachi, Ltd.
    Inventors: Masaru Izawa, Kenetsu Yokogawa, Nobuyuki Negishi, Yoshinori Momonoi, Shinichi Tachi