Patents by Inventor Shinji Hiramitsu

Shinji Hiramitsu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8847374
    Abstract: A power semiconductor module includes a power semiconductor element formed with a plurality of control electrodes on one main surface, a first conductor plate bonded by way of a first solder material to one of the main surfaces of the power semiconductor element, and a second conductor plate bonded by way of a second solder material on the other main surface of the power semiconductor element. A first protrusion section protruding from the base section of the applicable first conductor plate and including a first protrusion surface formed over the upper side, is formed over the first conductor plate. A second protrusion section including a second protrusion surface formed facing opposite one of the main surfaces of the power semiconductor element. The first solder material is interposed between the power semiconductor element and the first conductor plate while avoiding the plural control electrodes.
    Type: Grant
    Filed: September 5, 2011
    Date of Patent: September 30, 2014
    Assignee: Hitachi Automotive Systems, Ltd.
    Inventors: Eiichi Ide, Shinji Hiramitsu, Hiroshi Hozoji, Nobutake Tsuyuno, Kinya Nakatsu, Takeshi Tokuyama, Akira Matsushita, Yusuke Takagi
  • Publication number: 20140098588
    Abstract: A power module includes a plurality of semiconductor devices constituting upper/lower arms of an inverter circuit, a plurality of conductive plates arranged to face electrode surfaces of the semiconductor devices and a module case configured to accommodate the semiconductor devices and conductive plates, wherein the module case includes a heat-radiation member made of plate-like metal and facing a surface of the conductive plate and a metallic frame body having an opening that is closed by the heat-radiation member, and wherein a heat-radiation fin unit having a plurality of heat-radiation fins vertically arranged thereon is provided at a center of the heat-radiation member, and a joint portion with the frame body is provided at an peripheral edge of the heat-radiation member, and the heat radiation member has a heat conductivity higher than that of the frame body, and the frame body has a higher rigidity than that of the heat-radiation member.
    Type: Application
    Filed: May 22, 2012
    Publication date: April 10, 2014
    Applicant: Hitachi Automotive Systems, Ltd.
    Inventors: Yujiro Kaneko, Tokihito Suwa, Shinji Hiramitsu, Takahiro Shimura
  • Patent number: 8659130
    Abstract: A power module includes: a sealing body including a semiconductor element having a plurality of electrode surfaces, a first conductor plate connected to one electrode surface of the semiconductor element via solder, and a sealing material for sealing the semiconductor element and the first conductor plate, the sealing body having at least a first surface and a second surface on the opposite side of the first surface; and a case for housing the sealing body. The case is configured by a first heat radiation plate opposed to the first surface of the sealing body, a second heat radiation plate opposed to the second surface of the sealing body, and an intermediate member that connects the first heat radiation plate and the second heat radiation plate. The intermediate member has a first thin section having thickness smaller than the thickness of the first heat radiation plate, more easily elastically deformed than the first heat radiation plate, and formed to surround the first heat radiation plate.
    Type: Grant
    Filed: April 26, 2011
    Date of Patent: February 25, 2014
    Assignee: Hitachi Automotive Systems, Ltd.
    Inventors: Yusuke Takagi, Kaoru Uchiyama, Tokihito Suwa, Kinya Nakatsu, Takeshi Tokuyama, Shinji Hiramitsu
  • Publication number: 20130328185
    Abstract: A power semiconductor module includes: a circuit body having a power semiconductor element and a conductor member connected to the power semiconductor element; a case in which the circuit body is housed; and a connecting member which connects the circuit body and the case. The case includes: a first heat dissipating member and a second heat dissipating member which are disposed in opposed relation to each other while interposing the circuit body in between; a side wall which joins the first heat dissipating member and the second heat dissipating member; and an intermediate member which is formed on the periphery of the first heat dissipating member and connected to the side wall, the intermediate member including a curvature that is projected toward a housing space of the case.
    Type: Application
    Filed: February 21, 2012
    Publication date: December 12, 2013
    Applicant: Hitachi Automotive Systems, Ltd.
    Inventors: Shinji Hiramitsu, Atsushi Koshizawa, Masato Higuma, Hiroshi Tokuda, Keiji Kawahara
  • Publication number: 20130175678
    Abstract: A power semiconductor module includes a power semiconductor element formed with a plurality of control electrodes on one main surface, a first conductor plate bonded by way of a first solder material to one of the main surfaces of the power semiconductor element, and a second conductor plate bonded by way of a second solder material on the other main surface of the power semiconductor element. A first protrusion section protruding from the base section of the applicable first conductor plate and including a first protrusion surface formed over the upper side, is formed over the first conductor plate. A second protrusion section including a second protrusion surface formed facing opposite one of the main surfaces of the power semiconductor element. The first solder material is interposed between the power semiconductor element and the first conductor plate while avoiding the plural control electrodes.
    Type: Application
    Filed: September 5, 2011
    Publication date: July 11, 2013
    Applicant: Hitachi Automotive Systems, Ltd.
    Inventors: Eiichi Ide, Shinji Hiramitsu, Hiroshi Hozoji, Nobutake Tsuyuno, Kinya Nakatsu, Takeshi Tokuyama, Akira Matsushita, Yusuke Takagi
  • Patent number: 8421232
    Abstract: A semiconductor device includes a semiconductor element, a support member bonded to a first surface of the semiconductor element with a first bonding material and a lead electrode bonded to a second surface of the semiconductor element supported on the support member with a second bonding material, and further including a method of producing the semiconductor device. Respective connecting parts of the support member and the lead electrode are Ni-plated and each of the first and the second bonding material is a Sn solder having a Cu6Sn5 content greater than a eutectic content.
    Type: Grant
    Filed: May 27, 2011
    Date of Patent: April 16, 2013
    Assignee: Hitachi, Ltd.
    Inventors: Osamu Ikeda, Masato Nakamura, Satoshi Matsuyoshi, Koji Sasaki, Shinji Hiramitsu
  • Publication number: 20130062751
    Abstract: A power module includes: a sealing body including a semiconductor element having a plurality of electrode surfaces, a first conductor plate connected to one electrode surface of the semiconductor element via solder, and a sealing material for sealing the semiconductor element and the first conductor plate, the sealing body having at least a first surface and a second surface on the opposite side of the first surface; and a case for housing the sealing body. The case is configured by a first heat radiation plate opposed to the first surface of the sealing body, a second heat radiation plate opposed to the second surface of the sealing body, and an intermediate member that connects the first heat radiation plate and the second heat radiation plate. The intermediate member has a first thin section having thickness smaller than the thickness of the first heat radiation plate, more easily elastically deformed than the first heat radiation plate, and formed to surround the first heat radiation plate.
    Type: Application
    Filed: April 26, 2011
    Publication date: March 14, 2013
    Inventors: Yusuke Takagi, Kaoru Uchiyama, Tokihito Suwa, Kinya Nakatsu, Takeshi Tokuyama, Shinji Hiramitsu
  • Patent number: 8183681
    Abstract: A semiconductor device which includes a semiconductor chip; an electrically conductive base electrode bonded to the lower surface of the chip by a first bonding member; an electrically conductive lead electrode bonded to the upper surface of the chip by a second bonding member; and a first stress relief member for reducing stress developed in the first bonding member due to the difference in thermal expansion between the chip and the base electrode. Both the base electrode and the first stress relief member are in direct contact with the lower surface of the first bonding member. A protrusion is formed upstanding from the base electrode in direct contact with the first bonding member, and the first stress relief member surrounds a circumferential portion of the protrusion.
    Type: Grant
    Filed: June 29, 2009
    Date of Patent: May 22, 2012
    Assignee: Hitachi, Ltd.
    Inventors: Shinji Hiramitsu, Hiroyuki Ohta, Koji Sasaki, Masato Nakamura, Osamu Ikeda, Satoshi Matsuyoshi
  • Publication number: 20110223718
    Abstract: A semiconductor device includes a semiconductor element, a support member bonded to a first surface of the semiconductor element with a first bonding material and a lead electrode bonded to a second surface of the semiconductor element supported on the support member with a second bonding material, and further including a method of producing the semiconductor device. Respective connecting parts of the support member and the lead electrode are Ni-plated and each of the first and the second bonding material is a Sn solder having a Cu6Sn5 content greater than a eutectic content.
    Type: Application
    Filed: May 27, 2011
    Publication date: September 15, 2011
    Inventors: Osamu Ikeda, Masato Nakamura, Satoshi Matsuyoshi, Koji Sasaki, Shinji Hiramitsu
  • Patent number: 7964492
    Abstract: A semiconductor device includes a semiconductor element, a support member bonded to a first surface of the semiconductor element with a first bonding material and a lead electrode bonded to a second surface of the semiconductor element supported on the support member with a second bonding material, and further including a method of producing the semiconductor device. Respective connecting parts of the support member and the lead electrode are Ni-plated and each of the first and the second bonding material is a Sn solder having a Cu6Sn5 content greater than a eutectic content.
    Type: Grant
    Filed: September 22, 2008
    Date of Patent: June 21, 2011
    Assignee: Hitachi, Ltd.
    Inventors: Osamu Ikeda, Masato Nakamura, Satoshi Matsuyoshi, Koji Sasaki, Shinji Hiramitsu
  • Patent number: 7928587
    Abstract: A power semiconductor module having a surface of the power semiconductor chip and an external circuit pattern connected by an aluminum wire, and sealed with an epoxy resin, wherein wire diameter of the aluminum wire is 0.4±0.05 mm?, and coefficient of linear expansion of the epoxy resin in a rated temperature range of a module is from 15 to 20 ppm/K.
    Type: Grant
    Filed: April 18, 2008
    Date of Patent: April 19, 2011
    Assignee: Hitachi, Ltd.
    Inventors: Akihiro Tamba, Kazuhiro Suzuki, Koji Sasaki, Shinji Hiramitsu, Hirokazu Inoue
  • Publication number: 20090321783
    Abstract: A semiconductor device which includes a semiconductor chip; an electrically conductive base electrode bonded to the lower surface of the semiconductor chip by a first bonding member; an electrically conductive lead electrode bonded to the upper surface of the semiconductor chip by a second bonding member; and a first stress relief member for reducing stress developed in the first bonding member due to the difference in thermal expansion between the semiconductor chip and the base electrode, wherein both the base electrode and the first stress relief member are in direct contact with the lower surface of the first bonding member.
    Type: Application
    Filed: June 29, 2009
    Publication date: December 31, 2009
    Inventors: Shinji Hiramitsu, Hiroyuki Ohta, Koji Sasaki, Masato Nakamura, Osamu Ikeda, Satoshi Matsuyoshi
  • Publication number: 20090159650
    Abstract: A semiconductor device includes a semiconductor element, a support member bonded to a first surface of the semiconductor element with a first bonding material and a lead electrode bonded to a second surface of the semiconductor element supported on the support member with a second bonding material, and further including a method of producing the semiconductor device. Respective connecting parts of the support member and the lead electrode are Ni-plated and each of the first and the second bonding material is a Sn solder having a Cu6Sn5 content greater than a eutectic content.
    Type: Application
    Filed: September 22, 2008
    Publication date: June 25, 2009
    Inventors: Osamu Ikeda, Masato Nakamura, Satoshi Matsuyoshi, Koji Sasaki, Shinji Hiramitsu
  • Publication number: 20080258316
    Abstract: A power semiconductor module having a surface of the power semiconductor chip and an external circuit pattern connected by an aluminum wire, and sealed with an epoxy resin, wherein wire diameter of the aluminum wire is 0.4±0.05 mm?, and coefficient of linear expansion of the epoxy resin in a rated temperature range of a module is from 15 to 20 ppm/K.
    Type: Application
    Filed: April 18, 2008
    Publication date: October 23, 2008
    Inventors: Akihiro Tamba, Kazuhiro Suzuki, Koji Sasaki, Shinji Hiramitsu, Hirokazu Inoue
  • Patent number: 7423349
    Abstract: The present invention provides a semiconductor device comprising a semiconductor element and a copper member which are bonded to each other by a bismuth-based (Bi-based) bonding material having its melting temperature of not less than 250° C., wherein silver (Ag) is diffused in a region of the bonding material in the vicinity of an interface thereof to the semiconductor element with an inclination of concentration of the silver from the interface, in order to realize a manufacture of the semiconductor device without using lead (Pb) at low cost.
    Type: Grant
    Filed: April 27, 2006
    Date of Patent: September 9, 2008
    Assignee: Hitachi, Ltd.
    Inventors: Shosaku Ishihara, Osamu Ikeda, Ryouichi Kajiwara, Shinji Hiramitsu, Satoshi Matsuyoshi
  • Publication number: 20070182023
    Abstract: By making coefficients of linear thermal expansion of stress relief members on upper and lower surface sides of a semiconductor chip small, thermal strain on joint members above and below the semiconductor chip is decreased and development of a crack therein is suppressed to ensure a joint area. Furthermore, by making areas of electrodes and stress relief members large enough to include a project plane of the semiconductor chip projected onto the joint surfaces thereof, even if a crack develops into the joint member between the stress relief member and the electrode, a joint area larger than the area of the semiconductor chip can be ensured for a certain amount of time. As a result, a semiconductor device capable of simultaneously ensuring the joint areas of the respective joint members and preventing a decrease in heat release capability is provided.
    Type: Application
    Filed: January 16, 2007
    Publication date: August 9, 2007
    Applicant: Hitachi, Ltd.
    Inventors: Shinji Hiramitsu, Satoshi Matsuyoshi, Koji Sasaki, Takeshi Terasaki
  • Patent number: 7193319
    Abstract: A semiconductor device is provided, in which buffer layers having a coefficient of linear expansion of 3×10?6/° C. to 8×10?6/° C. are joined to upper and lower surfaces of a silicon chip through a Pb-free solder having a thickness of not more than 0.05 mm and a melting point of not less than 250° C. The upper surface of the upper buffer layer and the lower surface of the lower buffer layer are respectively joined to a lead and a base through Pb-free solders having a thickness of not less than 0.15 mm and a melting point of not less than 250° C.
    Type: Grant
    Filed: November 29, 2005
    Date of Patent: March 20, 2007
    Assignee: Hitachi, Ltd.
    Inventors: Koji Sasaki, Shinji Hiramitsu, Tadaaki Kariya, Satoshi Matsuyoshi, Ryouichi Kajiwara, Shosaku Ishihara
  • Publication number: 20070057021
    Abstract: A semiconductor device includes a semiconductor element, a support member bonded to a first surface of the semiconductor element with a first bonding material, and a lead electrode bonded to a second surface of the semiconductor element supported on the support member with a second bonding material. Respective connecting parts of the support member and the lead electrode are Ni-plated and each of the first and the second bonding material is a Sn solder having a Cu6Sn5 content greater than a eutectic content.
    Type: Application
    Filed: June 21, 2006
    Publication date: March 15, 2007
    Inventors: Osamu Ikeda, Masato Nakamura, Satoshi Matsuyoshi, Koji Sasaki, Shinji Hiramitsu
  • Publication number: 20060246304
    Abstract: The present invention provides a semiconductor device comprising a semiconductor element and a copper member which are bonded to each other by a bismuth-based (Bi-based) bonding material having its melting temperature of not less than 250° C., wherein silver (Ag) is diffused in a region of the bonding material in the vicinity of an interface thereof to the semiconductor element with an inclination of concentration of the silver from the interface, in order to realize a manufacture of the semiconductor device without using lead (Pb) at low cost.
    Type: Application
    Filed: April 27, 2006
    Publication date: November 2, 2006
    Inventors: Shosaku Ishihara, Osamu Ikeda, Ryouichi Kajiwara, Shinji Hiramitsu, Satoshi Matsuyoshi
  • Publication number: 20060214291
    Abstract: A semiconductor device is provided, in which buffer layers having a coefficient of linear expansion of 3×10?6/° C. to 8×10?6/° C. are joined to upper and lower surfaces of a silicon chip through a Pb-free solder having a thickness of not more than 0.05 mm and a melting point of not less than 250° C. The upper surface of the upper buffer layer and the lower surface of the lower buffer layer are respectively joined to a lead and a base through Pb-free solders having a thickness of not less than 0.15 mm and a melting point of not less than 250° C.
    Type: Application
    Filed: November 29, 2005
    Publication date: September 28, 2006
    Inventors: Koji Sasaki, Shinji Hiramitsu, Tadaaki Kariya, Satoshi Matsuyoshi, Ryouichi Kajiwara, Shosaku Ishihara