Abstract: Power consumption of a semiconductor device is reduced by sharpening the rise of a drain current when a gate voltage of a field effect transistor is less than a threshold voltage. As means therefor, in a fully-depleted MOSFET in which a thickness of a semiconductor layer serving as a channel region is 20 nm or less, a gate plug connected to a gate electrode is constituted of a first plug, a ferroelectric film, and a second plug sequentially stacked on the gate electrode. Here, an area where a contact surface between the first plug and the ferroelectric film and a contact surface between the ferroelectric film and the second plug overlap in a plan view is smaller than an area where the gate electrode and a semiconductor layer serving as an active region overlap.

Abstract: Power consumption of a semiconductor device is reduced by sharpening the rise of a drain current when a gate voltage of a field effect transistor is less than a threshold voltage. As means therefor, in a fully-depleted MOSFET in which a thickness of a semiconductor layer serving as a channel region is 20 nm or less, a gate plug connected to a gate electrode is constituted of a first plug, a ferroelectric film, and a second plug sequentially stacked on the gate electrode. Here, an area where a contact surface between the first plug and the ferroelectric film and a contact surface between the ferroelectric film and the second plug overlap in a plan view is smaller than an area where the gate electrode and a semiconductor layer serving as an active region overlap.

Abstract: The present invention provides a field-effect transistor having an accumulation-layer-operation type field-effect transistor that includes a semiconductor layer in which a source region, a channel region, and a drain region that have either an N-type or P-type conductivity in common are formed, and a gate electrode disposed adjacent to the channel region via a gate insulating film, wherein the gate insulating film is made of a dielectric having a change gradient of a relative dielectric constant in which the relative dielectric constant changes to decrease according to the magnitude of a gate voltage applied to the gate electrode.

Abstract: The present invention provides a field-effect transistor having an accumulation-layer-operation type field-effect transistor that includes a semiconductor layer in which a source region, a channel region, and a drain region that have either an N-type or P-type conductivity in common are formed, and a gate electrode disposed adjacent to the channel region via a gate insulating film, wherein the gate insulating film is made of a dielectric having a change gradient of a relative dielectric constant in which the relative dielectric constant changes to decrease according to the magnitude of a gate voltage applied to the gate electrode.

Abstract: A semiconductor device includes a semiconductor layer formed on an insulating layer; a gate electrode disposed on said semiconductor layer via a gate insulating film; a source/drain layer composed by including an alloy layer or a metal layer with a bottom surface in contact with the insulating layer, with joint surfaces to a channel region disposed along crystal orientation faces of said semiconductor layer; and impurity-doped layers formed in a self-aligned manner along interfaces of the alloy layer or the metal layer, and said semiconductor layer.

Abstract: A method for forming silicide includes the steps of: forming a nickel film on a silicon layer (or a silicon substrate); introducing nitrogen into at least one of the nickel film and the interface between the nickel film and the silicon layer (or the silicon substrate); and after the introduction of the nitrogen, applying heat treatment to the nickel film and the silicon layer (or the silicon substrate) under predetermined conditions to form a nickel disilicide layer.

Abstract: A semiconductor wafer is placed in a chamber of a film-deposition apparatus, and gas in the chamber is exhausted from a gas exhaust outlet. Then, with interrupting the exhaust, an inert gas is introduced into the chamber so that the chamber has a pressure of 133 Pa or higher and lower than 101325 Pa, and then a mixed gas of an inert gas and a source gas for depositing a metal oxide film is introduced into the chamber. Then, after exhausting the gas in the chamber, an oxidation gas is introduced into the chamber to react with the molecules of the source gas absorbed on the semiconductor wafer to form a metal oxide film on the semiconductor wafer. By repeating these steps, a metal oxide film having a desired film thickness is deposited on the semiconductor wafer with a film-thickness distribution by an ALD method.

Abstract: A semiconductor device includes a semiconductor layer formed on an insulating layer; a gate electrode disposed on said semiconductor layer via a gate insulating film; a source/drain layer composed by including an alloy layer or a metal layer with a bottom surface in contact with the insulating layer, with joint surfaces to a channel region disposed along crystal orientation faces of said semiconductor layer; and impurity-doped layers formed in a self-aligned manner along interfaces of the alloy layer or the metal layer, and said semiconductor layer.

Abstract: A semiconductor device includes a semiconductor layer formed on an insulating layer; a gate electrode disposed on said semiconductor layer via a gate insulating film; a source/drain layer composed by including an alloy layer or a metal layer with a bottom surface in contact with the insulating layer, with joint surfaces to a channel region disposed along crystal orientation faces of said semiconductor layer; and impurity-doped layers formed in a self-aligned manner along interfaces of the alloy layer or the metal layer, and said semiconductor layer.

Abstract: A semiconductor wafer is placed in a chamber of a film-deposition apparatus, and gas in the chamber is exhausted from a gas exhaust outlet. Then, with interrupting the exhaust, an inert gas is introduced into the chamber so that the chamber has a pressure of 133 Pa or higher and lower than 101325 Pa, and then a mixed gas of an inert gas and a source gas for depositing a metal oxide film is introduced into the chamber. Then, after exhausting the gas in the chamber, an oxidation gas is introduced into the chamber to react with the molecules of the source gas absorbed on the semiconductor wafer to form a metal oxide film on the semiconductor wafer. By repeating these steps, a metal oxide film having a desired film thickness is deposited on the semiconductor wafer with a film-thickness distribution by an ALD method.

Abstract: It is an object of the present invention to provide a technology which can form a sidewall without deteriorating device characteristics. A gate insulating film formed of a high dielectric constant film and a polysilicon film are formed on a semiconductor substrate. By patterning the polysilicon film, silicon gate electrodes are formed. Subsequently, a laminated film of an aluminum oxide film and a silicon nitride film is formed on the semiconductor substrate. Thereafter, the silicon nitride film is anisotropically dry-etched to leave silicon nitride films only on sidewalls of the silicon gate electrodes. At this time, the aluminum oxide film formed under the silicon nitride film functions as an etching stopper. Then, the exposed aluminum oxide film is wet-etched using diluted hydrofluoric acid.

Abstract: A method for forming silicide includes the steps of: forming a nickel film on a silicon layer (or a silicon substrate); introducing nitrogen into at least one of the nickel film and the interface between the nickel film and the silicon layer (or the silicon substrate); and after the introduction of the nitrogen, applying heat treatment to the nickel film and the silicon layer (or the silicon substrate) under predetermined conditions to form a nickel disilicide layer.

Abstract: A semiconductor device includes a semiconductor layer formed on an insulating layer; a gate electrode disposed on said semiconductor layer via a gate insulating film; a source/drain layer composed by including an alloy layer or a metal layer with a bottom surface in contact with the insulating layer, with joint surfaces to a channel region disposed along crystal orientation faces of said semiconductor layer; and impurity-doped layers formed in a self-aligned manner along interfaces of the alloy layer or the metal layer, and said semiconductor layer.

Abstract: A semiconductor device includes a gate electrode disposed on a semiconductor layer via a gate insulating film; a source layer formed in the semiconductor layer to be separated by a first offset length from one end of said gate electrode; a drain layer formed in the semiconductor layer to be separated by a second offset length from the other end of said gate electrode; a first side wall formed at a side wall of said gate electrode at a side of said source layer; and a second side wall formed at the side wall of said gate electrode at a side of said drain layer, wherein the first offset length is shorter than the second offset length, and a length of said first side wall is shorter than a length of said second side wall.

Abstract: A sound absorbing structure including a sound absorbing member, an air layer, and a resonant sound absorbing structure. The air layer is formed in the rear of the sound absorbing member. The resonant sound absorbing structure includes a slit and is formed in the rear of the sound absorbing member. The sound absorbing member is a surface plate covering the rear air layer and the resonant sound absorbing structure, and the sound absorbing member is shaped in one of a plate and plane.

Abstract: An epitaxial compound structure has a crystal structure including fluorite crystal on which is epitaxially grown a film of simple perovskite crystal with a (011) orientation.

Abstract: An epitaxial compound structure has a crystal structure including fluorite crystal on which is epitaxially grown a film of simple perovskite crystal with a (011) orientation.

Abstract: A crystal growth method for thin films of oxides wherein a vapor-phase deposition method is used to grow crystals for Bi2Sr2CanCun+1O6+2n oxide thin film 304, where n is an integer equal to 1 or greater, includes a first step of growing a Bi2Sr2CuO6 oxide thin film 302 to an arbitrary number of molecular layers by setting a growth environment to conditions in which oxides of bismuth alone are not formed, but intended multi-element oxide is formed, and supplying the growth environment with an excess of bismuth compared with other elements, thereby preventing deficiency of bismuth and also evaporating excess bismuth from the thin film, a second step of causing a layer 303 containing calcium atoms and copper atoms each in the amount of n/2 of the number of strontium atoms contained in the Bi2Sr2CuO6 oxide thin film to accumulate upon the Bi2Sr2CuO6 oxide thin film, and a third step of, in a state in which environmental temperature is set higher than the environmental temperature in the first step, caus

Abstract: A method for crystal growth of a multi-element oxide thin film containing bismuth as a constituent element has setting a growth environment to fall under conditions such that an oxide of bismuth alone will not be formed, but the desired multi-element oxide will be formed; and supplying bismuth in excess of other elements to the growth environment, to prevent the lack of bismuth and evaporate surplus bismuth from the thin film. This method suppresses the formation of different phases or the precipitation of impurities ascribed to the deviation of the proportion of bismuth element from the desired composition, enables a high quality thin film to be grown, and markedly broadens the ranges of the set conditions for the thin film growth temperature and oxidizing gas in comparison with conventional technologies.