Patents by Inventor Shinji Semba

Shinji Semba has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7348191
    Abstract: A plurality of semiconductor chips is mounted on a surface of a substrate to be used for manufacturing semiconductor devices. The semiconductor chips are collectively sealed with resin, thereby forming resin-sealed sections. A plurality of solder balls are formed on the back surface of the substrate such that an interval A between the corresponding solder balls of adjacent semiconductor chips becomes “n” times (“n” is an integer greater than 1) an interval B between the solder balls on the semiconductor chip. After the semiconductor chips have been subjected to an electrical test, the resin-sealed sections and the substrate are sliced, thus breaking the semiconductor chips into pieces.
    Type: Grant
    Filed: June 23, 2006
    Date of Patent: March 25, 2008
    Assignee: Renesas Technology Corp.
    Inventors: Kazunari Michii, Naoyuki Shinonaga, Shinji Semba
  • Patent number: 7166490
    Abstract: A plurality of semiconductor chips is mounted on a surface of a substrate to be used for manufacturing semiconductor devices. The semiconductor chips are collectively sealed with resin, thereby forming resin-sealed sections. A plurality of solder balls are formed on the back surface of the substrate such that an interval A between the closest solder balls of adjacent semiconductor chips becomes “n” times (“n” is an integer greater than 1) an interval B between the solder balls on the semiconductor chip. After the semiconductor chips have been subjected to an electrical test, the resin-sealed sections and the substrate are sliced, thus breaking the semiconductor chips into pieces.
    Type: Grant
    Filed: January 6, 2003
    Date of Patent: January 23, 2007
    Assignee: Renesas Technology Corp.
    Inventors: Kazunari Michii, Naoyuki Shinonaga, Shinji Semba
  • Publication number: 20060240596
    Abstract: A plurality of semiconductor chips is mounted on a surface of a substrate to be used for manufacturing semiconductor devices. The semiconductor chips are collectively sealed with resin, thereby forming resin-sealed sections. A plurality of solder balls are formed on the back surface of the substrate such that an interval A between the corresponding solder balls of adjacent semiconductor chips becomes “n” times (“n” is an integer greater than 1) an interval B between the solder balls on the semiconductor chip. After the semiconductor chips have been subjected to an electrical test, the resin-sealed sections and the substrate are sliced, thus breaking the semiconductor chips into pieces.
    Type: Application
    Filed: June 23, 2006
    Publication date: October 26, 2006
    Applicant: Renesas Technology Corp.
    Inventors: Kazunari Michii, Naoyuki Shinonaga, Shinji Semba
  • Patent number: 6955264
    Abstract: In order to provide a method of detecting protrusion of an inspection object from a palette improved to be capable of making highly precise detection and reducing a socket breakage ratio, an inspection object is introduced into each of a plurality of pockets provided on the surface of a palette, which in turn is transported. A reflection level of the inspection object stored in each of the plurality of pockets is measured every palette with a reflection type photoelectric sensor. The maximum value and the minimum value of the reflection level are obtained from data of every palette, for calculating a dispersion width defined by the difference between the maximum value and the minimum value. The dispersion width is compared with a previously set determination threshold, for determining whether or not the dispersion width is greater than the determination threshold.
    Type: Grant
    Filed: May 15, 2002
    Date of Patent: October 18, 2005
    Assignee: Renesas Technology Corp.
    Inventors: Toshiya Ijichi, Shinji Semba
  • Patent number: 6836004
    Abstract: A lead frame comprises a plurality of frame assemblies. Each framework assembly includes a framework, a suspension lead, a die pad, a plurality of inner leads and outer leads, a first tie bar and a second tie bar, and a lead support. The plurality of framework assemblies are disposed alongside of one another in a direction perpendicular to a direction in which the plurality of outer leads extend. A distance between close-set outer leads in each two neighboring frameworks is substantially n times a pitch of the plurality of outer leads in each framework, wherein n is an integer.
    Type: Grant
    Filed: January 15, 2003
    Date of Patent: December 28, 2004
    Assignee: Renesas Technology Corp.
    Inventors: Kazunari Michii, Naoyuki Shinonaga, Shinji Semba
  • Publication number: 20040018663
    Abstract: A lead frame comprises a plurality of frame assemblies. Each framework assembly includes a framework, a suspension lead, a die pad, a plurality of inner leads and outer leads, a first tie bar and a second tie bar, and a lead support. The plurality of framework assemblies are disposed alongside of one another in a direction perpendicular to a direction in which the plurality of outer leads extend. A distance between close-set outer leads in each two neighboring frameworks is substantially n times a pitch of the plurality of outer leads in each framework, wherein n is an integer.
    Type: Application
    Filed: January 15, 2003
    Publication date: January 29, 2004
    Applicant: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Kazunari Michii, Naoyuki Shinonaga, Shinji Semba
  • Publication number: 20040007783
    Abstract: A plurality of semiconductor chips is mounted on a surface of a substrate to be used for manufacturing semiconductor devices. The semiconductor chips are collectively sealed with resin, thereby forming resin-sealed sections. A plurality of solder balls are formed on the back surface of the substrate such that an interval A between the closest solder balls of adjacent semiconductor chips becomes “n” times (“n” is an integer greater than 1) an interval B between the solder balls on the semiconductor chip. After the semiconductor chips have been subjected to an electrical test, the resin-sealed sections and the substrate are sliced, thus breaking the semiconductor chips into pieces.
    Type: Application
    Filed: January 6, 2003
    Publication date: January 15, 2004
    Applicant: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Kazunari Michii, Naoyuki Shinonaga, Shinji Semba
  • Publication number: 20030104642
    Abstract: In order to provide a method of detecting protrusion of an inspection object from a palette improved to be capable of making highly precise detection and reducing a socket breakage ratio, an inspection object is introduced into each of a plurality of pockets provided on the surface of a palette, which in turn is transported. A reflection level of the inspection object stored in each of the plurality of pockets is measured every palette with a reflection type photoelectric sensor. The maximum value and the minimum value of the reflection level are obtained from data of every palette, for calculating a dispersion width defined by the difference between the maximum value and the minimum value. The dispersion width is compared with a previously set determination threshold, for determining whether or not the dispersion width is greater than the determination threshold.
    Type: Application
    Filed: May 15, 2002
    Publication date: June 5, 2003
    Applicant: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Toshiya Ijichi, Shinji Semba
  • Patent number: 6163145
    Abstract: A transporting apparatus used in testing a plurality of semiconductor devices includes a magazine in which a plurality of pallets are stacked in plural stages, each pallet with a plurality of semiconductor device placed thereon; a distributing stocker mechanism for placing the plurality of pallets in the magazine onto a carrier; a carrier transporting mechanism for transporting the carrier into a test station in a constant temperature room and transporting the carrier after to outside the constant temperature room; and a recovery stocker mechanism for recovering the plurality of pallets after test on the carrier into the magazine. Thus, the transporting apparatus with high installing area efficiency and high test efficiency can be fabricated at low production cost.
    Type: Grant
    Filed: August 27, 1997
    Date of Patent: December 19, 2000
    Assignees: Mitsubishi Denki Kabushiki Kaisha, Mitsubishi Electric Engineering Co., Ltd.
    Inventors: Hiromichi Yamada, Kunio Kobayashi, Sekio Ito, Eiri Yuhara, Shinji Semba, Jiro Takamura, Shinji Sogabe, Hiroyuki Shinmen, Mitsuru Yamazaki
  • Patent number: 5578919
    Abstract: A tape carrier includes an elongated electrically insulating tape divided into a plurality of separable tape sections. A semiconductor chip is mounted at each of a plurality of semiconductor device mounting portions having a plurality of leads on each of the tape sections. The semiconductor chips are connected to the respective leads. A plurality of testing connection terminals on each of the tape sections are connected to respective testing connection terminals by testing wires.
    Type: Grant
    Filed: March 20, 1995
    Date of Patent: November 26, 1996
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Shinji Semba, Shinji Enoshima, Kunio Kobayashi, Isamu Yamamoto
  • Patent number: 5517036
    Abstract: A tape carrier includes an elongated electrically insulating tape divided into a plurality of separable tape sections. A semiconductor chip is mounted at each of a plurality of semiconductor device mounting portions having a plurality of leads on each of the tape sections. The semiconductor chips are connected to the respective leads. A plurality of testing connection terminals on each of the tape sections are connected to respective testing connection terminals by testing wires.
    Type: Grant
    Filed: April 20, 1995
    Date of Patent: May 14, 1996
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Shinji Semba, Shinji Enoshima, Kunio Kobayashi, Isamu Yamamoto