Patents by Inventor Shinjiro Inabata

Shinjiro Inabata has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9766265
    Abstract: While a light sheet is generated at a designated region, images of fluid flowing through the designated region are formed at different times. For an inspection region of the plurality of inspection regions defined in the images that has a degree of difference exceeding a threshold between the local flow velocity vector v(a, b, T) at a certain time T and a reference flow velocity vector v(a, b, T±) at times T± that are different from the certain time T, the flow velocity vector v(a, b, T) at the reference time T is corrected with the reference flow velocity vector v(a, b, T±).
    Type: Grant
    Filed: December 4, 2014
    Date of Patent: September 19, 2017
    Assignee: HONDA MOTOR CO., LTD.
    Inventors: Shinjiro Inabata, Yuichi Fukuchi
  • Publication number: 20150177269
    Abstract: While a light sheet is generated at a designated region, images of fluid flowing through the designated region are formed at different times. For an inspection region of the plurality of inspection regions defined in the images that has a degree of difference exceeding a threshold between the local flow velocity vector v(a,b,T) at a certain time T and a reference flow velocity vector v(a,b,T±) at times T± that are different from the certain time T, the flow velocity vector v(a,b,T) at the reference time T is corrected with the reference flow velocity vector v(a,b,T±).
    Type: Application
    Filed: December 4, 2014
    Publication date: June 25, 2015
    Inventors: Shinjiro INABATA, Yuichi FUKUCHI
  • Patent number: 7370328
    Abstract: When parallel processing is executed by parallel computers composed of a host computer and a plurality of processors connected to the host computer through a common bus, there is provided a method of assigning jobs to respective processors with high efficiency. A job in which a ratio between a communication time and a calculation time is larger than a predetermined value or larger than a fraction of processors and a job in which a ratio between a communication time and a calculation time is smaller than a predetermined value or smaller than a fraction of processors can be alternately assigned to respective processors.
    Type: Grant
    Filed: April 25, 2002
    Date of Patent: May 6, 2008
    Assignees: Honda Motor Co., Ltd., Taisho Pharmaceutical Co., Ltd.
    Inventors: Sou Yamada, Shinjiro Inabata, Nobuaki Miyakawa, Hajime Takashima, Kunihiro Kitamura, Unpei Nagashima
  • Patent number: 6799151
    Abstract: Matrix element calculation carried out efficiently without the overhead of communication between a host computer and processor elements even in parallel calculation utilizing a low-cost communication device and multiple processor elements having memories of a small capacity. In a method for calculating molecular orbitals, for example, all elements F(I, J) of a Fock matrix are calculated where an outermost loop is a loop associated with combinations (RT) of contracted shell R and contracted shell T which satisfy relationships R≦Nshell and T≦R. A second loop is a loop associated with contracted shell S, and a third loop is a loop associated with contracted shell U. Alternatively, the second loop is a loop associated with the contracted shell U, and the third loop is a loop associated with the contracted shell S. The value of S ranges from 1 to R, and the value of U ranges from 1 to R.
    Type: Grant
    Filed: April 7, 2000
    Date of Patent: September 28, 2004
    Assignees: Taisho Pharmaceutical Co., Ltd, Honda Motor Co., Ltd.
    Inventors: So Yamada, Shinjiro Inabata, Nobuaki Miyakawa, Hajime Takashima, Kunihiro Kitamura, Shigeru Obara
  • Publication number: 20030204576
    Abstract: When parallel processing is executed by parallel computers composed of a host computer and a plurality of processors connected to the host computer through a common bus, there is provided a method of assigning jobs to respective processors with high efficiency. A job in which a ratio between a communication time and a calculation time is larger than a predetermined value or larger than a fraction of processors and a job in which a ratio between a communication time and a calculation time is smaller than a predetermined value or smaller than a fraction of processors can be alternately assigned to respective processors.
    Type: Application
    Filed: October 18, 2002
    Publication date: October 30, 2003
    Inventors: Sou Yamada, Shinjiro Inabata, Nobuaki Miyakawa, Hajime Takashima, Kunihiro Kitamura, Unpei Nagashima
  • Patent number: 6631391
    Abstract: There is provided a parallel computer and a parallel computing method which allows high precision parallel calculation to be executed without requiring a hardware scale while maintaining high calculation speed. A system is constructed by connecting a host processor with a plurality of special purpose processors via buses. The host processor carries out the operation in a format of double-precision floating-point and the special purpose processor carries out the operation in an internal format of floating-point. The special purpose processor comprises an input data converting section for converting from the double-precision to the internal format and an output data converting section for converting from the internal format to the double-precision. Because the sign part and the exponent part can use data in common in the data before and after the conversion, only the mantissa part is converted by a specific procedure.
    Type: Grant
    Filed: April 6, 2000
    Date of Patent: October 7, 2003
    Assignees: Fuji Xerox Co., Ltd., Taisho Pharmaceutical Co., Ltd.
    Inventors: Shinjiro Inabata, So Yamada, Nobuaki Miyakawa, Takashi Amisaki, Hajime Takashima, Kunihiro Kitamura
  • Patent number: 6073155
    Abstract: To obtain the sufficiently precise result of floating-point accumulation even if the quantity of computation is enormous, a floating-point accumulator according to the present invention is constituted as follows:When two floating-point data are stored in any of shift registers, the two data are respectively output to BUS0 and BUS1 via one connected to the shift register of buffers. The two output data are input to an adder via BUS0 and BUS1 and output as added result data after adding the floating-point numbers. The above added result data is returned to each input of the shift registers via BUSW and a multiplexer and written into the shift register corresponding to the addition of the higher level by one of the shift register holding floating-point data before addition. The floating-point numbers are accumulated by repeating the above operation.
    Type: Grant
    Filed: July 28, 1997
    Date of Patent: June 6, 2000
    Assignee: Fuji Xerox Co., Ltd.
    Inventors: Shinjiro Inabata, So Yamada, Shinjiro Toyoda, Nobuaki Miyakawa
  • Patent number: 6026422
    Abstract: Electron repulsion integrals are classified according to atomic nucleus coordinates, etc., coefficients are generated and are stored in a data memory, multiplication with addition operation is executed according to a product sum procedure of auxiliary integrals of recursive order 1 or less, and the result is stored in the data memory. Next, density matrix element is stored in the data memory, a multiplication with addition operation procedure of an electron repulsion integral of recursive order 2 not containing any procedure of recursive order 1 or less is generated, and an instruction memory is updated. Multiplication with addition operation is executed while data is read from the data memory, and the result is stored in the data memory. At the termination of the product sum procedure, calculation of electron repulsion integral gRstu is complete and the Fock matrix element value is updated.
    Type: Grant
    Filed: February 27, 1998
    Date of Patent: February 15, 2000
    Assignee: Fuji Xerox Co., Ltd.
    Inventors: So Yamada, Shinjiro Inabata, Nobuaki Miyakawa