Patents by Inventor Shinnosuke Maeda

Shinnosuke Maeda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20180209699
    Abstract: Problem To suppress the distribution of adsorption materials and binders between a heat-transfer member and a heat-transfer member from being disproportioned. SOLUTION TO PROBLEM There is provided a method for preparinq an adsorption device in which activated carbons are held in an area ? of accommodating a plurality of heat-transfer members 34 arranged by intervals with each other in a main body part 31.
    Type: Application
    Filed: August 25, 2016
    Publication date: July 26, 2018
    Inventors: Shinnosuke MAEDA, Tomohiro MARUYAMA
  • Patent number: 9237656
    Abstract: Embodiments of the presently-disclosed subject matter include a first laminated structure in which at least one conductor layer and at least one resin insulating layer are alternately formed is formed on a supporting substrate, and a core substrate is formed so as to come into contact with the conductor layer which is the uppermost layer of the first laminated structure. Then, laser light is emitted to the core substrate to form a through hole and a metal layer is formed in the through hole. Then, a second laminated structure including at least one conductor layer and at least one resin insulating layer is formed on the core substrate. At that time, the thickness of the conductor layer which is the uppermost layer of the first laminated structure is greater than that of the other conductor layers.
    Type: Grant
    Filed: December 20, 2012
    Date of Patent: January 12, 2016
    Assignee: NGK SPARK PLUG CO., LTD.
    Inventors: Shinnosuke Maeda, Tetsuo Suzuki, Takuya Hando, Atsuhiko Sugimoto, Satoshi Hirano, Hajime Saiki
  • Publication number: 20150327362
    Abstract: To improve the degree of freedom of design of a multilayer wiring substrate incorporating therein an electronic component. A multilayer wiring substrate includes a first layered structure including conductor layers and insulation layers including therein via conductors each having a diameter which decreases from the upper surface of the insulation layer toward the lower surface thereof; an electronic component embedded in the first layered structure; and a second layered structure stacked on the first layered structure, and including conductor layers, and an insulation layer including therein a via conductor having a diameter which decreases from the upper surface of the insulation layer toward the lower surface thereof.
    Type: Application
    Filed: September 11, 2013
    Publication date: November 12, 2015
    Inventor: Shinnosuke MAEDA
  • Publication number: 20150313018
    Abstract: A wiring substrate includes an insulation substrate, a through hole, an upper-surface-side land conductor, a lower-surface-side land conductor, and a through hole conductor. The insulation substrate includes a first insulation layer, a second insulation layer, and a glass fiber layer provided between the first and second insulation layers. The through hole has a diameter which decreases from the upper surface of the insulation substrate toward the interior thereof, which becomes smallest at the glass fiber layer, and which increases from the glass fiber layer toward the lower surface of the insulation substrate. The upper-surface-side land conductor and the lower-surface-side land conductor respectively cover the upper-surface-side and lower-surface-side openings of the through hole. The through hole conductor is formed in the through hole.
    Type: Application
    Filed: November 15, 2013
    Publication date: October 29, 2015
    Inventor: Shinnosuke MAEDA
  • Patent number: 9066419
    Abstract: To provide a multilayer wiring board that ensures sufficient close contact strength between a conformal type conductor and a resin insulating layer. A multilayer wiring board includes a multilayered construction where a plurality of resin insulating layers and a plurality of conductor layers are alternately layered. In each of a plurality of via holes formed in the resin insulating layers, a conformal via conductor is formed to electrically connect between the conductor layers. Filling up parts of the resin insulating layers layered at upper layer side inside of the conformal via conductor forms an anchor portion. The lower end side of the anchor portion bulges larger than the upper end side in the radially outward direction of the via hole.
    Type: Grant
    Filed: March 20, 2013
    Date of Patent: June 23, 2015
    Assignee: NGK SPARK PLUG CO., LTD.
    Inventor: Shinnosuke Maeda
  • Patent number: 9006580
    Abstract: Disclosed is a method of manufacturing a multilayer wiring substrate having a principal plane of the substrate and a rear plane thereof, having a structure such that a plurality of resin insulating layers and a plurality of conductor layers are laminated, and a plurality of chip component connecting terminals to which chip components are connectable are disposed on the principal plane of the substrate. This method has a feature including a plating layer forming process in which product plating layers which provide the plurality of chip component connecting terminals and a dummy plating layer on the surrounding of the product plating layers are formed on the surface of an exposed outermost resin insulating layer at the principal plane of the substrate. This method permits a thickness dispersion of the chip component connecting terminals to be suppressed and permits a connection reliability thereof to the chip components to be increased.
    Type: Grant
    Filed: June 7, 2012
    Date of Patent: April 14, 2015
    Assignee: NGK Spark Plug Co., Ltd.
    Inventors: Shinnosuke Maeda, Hajime Saiki, Satoshi Hirano
  • Patent number: 8946906
    Abstract: To provide a multilayer wiring substrate in which the connection reliability of via conductors is enhanced, via holes are formed in a resin interlayer insulation layer which isolates a lower conductor layer from an upper conductor layer, and via conductors are formed in the via holes for connecting the lower conductor layer and the upper conductor layer. The surface of the resin interlayer insulation layer is a rough surface, and the via holes open at the rough surface of the resin interlayer insulation layer. Stepped portions are formed in opening verge regions around the via holes such that the stepped portions are recessed from peripheral regions around the opening verge regions. The stepped portions are higher in surface roughness than the peripheral regions.
    Type: Grant
    Filed: December 13, 2011
    Date of Patent: February 3, 2015
    Assignee: NGK Spark Plug Co., Ltd.
    Inventor: Shinnosuke Maeda
  • Publication number: 20150027758
    Abstract: To provide a multilayer wiring substrate which can reliably prevent removal of a via conductor and which exhibits excellent connection reliability. A multilayer wiring substrate 10 has a multilayer build-up structure in which a plurality of resin insulation layers 33 and a plurality of conductor layers 42 are alternately stacked. Each of the resin insulation layers 33 formed of a resin insulation material 50 contains therein a glass cloth 51. The resin insulation material 50 of the resin insulation layer 33 has a via hole 43, and the glass cloth 51 has an aperture 52 at a position corresponding to the via hole 43. A portion of the glass cloth 51 corresponding to a opening edge of the aperture 52 protrudes inwardly from the inner wall of the via hole 43, and enters a side portion of the via conductor 44. Tip ends of glass fiber filaments 57 protruding from the inner wall 54 of the via hole 43 are bonded together through melting to form a weld portion 58.
    Type: Application
    Filed: March 20, 2013
    Publication date: January 29, 2015
    Inventor: Shinnosuke Maeda
  • Patent number: 8859077
    Abstract: A plurality of openings are formed in a resin insulation layer on a bottom surface side of a wiring laminate portion which constitutes a multilayer wiring substrate. A plurality of motherboard connection terminals are disposed to correspond to the openings. The motherboard connection terminals are primarily comprised of a copper layer, and peripheral portions of terminal outer surfaces thereof are covered by the outermost resin insulation layer. A dissimilar metal layer made of at least one metal which is lower in etching rate than copper is formed between an inner main surface of the outermost resin insulation layer and peripheral portions of the terminal outer surfaces.
    Type: Grant
    Filed: February 16, 2011
    Date of Patent: October 14, 2014
    Assignee: NGK Spark Plug Co., Ltd.
    Inventors: Shinnosuke Maeda, Tetsuo Suzuki, Satoshi Hirano
  • Publication number: 20140290997
    Abstract: To provide a multilayer wiring board that ensures sufficient adhesion between a resin insulating layer and a conductor layer and is excellent in connection reliability. The multilayer wiring board has a multilayered build-up construction where a plurality of resin insulating layers and a plurality of conductor layers are alternately laminated. The resin insulating layers are formed of the lower insulating layer and the upper insulating layer disposed on the lower insulating layer. The conductor layer is formed on the surface of the upper insulating layer. The upper insulating layer is formed thinner than the lower insulating layer. The silica filler occupying the upper insulating layer has a lower volume proportion than the volume proportion of the silica filler and the glass cloth that are occupying the lower insulating layer.
    Type: Application
    Filed: April 3, 2013
    Publication date: October 2, 2014
    Inventor: Shinnosuke Maeda
  • Patent number: 8847082
    Abstract: To provide a multilayer wiring substrate which can prevent migration of copper between wiring traces to thereby realize a higher degree of integration, a solder resist layer 25 having a plurality of openings 35, 36 is disposed on a top surface 31 side, and IC-chip connection terminals 41 and capacitor connection terminals 42 are buried in an outermost resin insulation layer 23 in contact with the solder resist layer 25. Each of the IC-chip connection terminals 41 and the capacitor connection terminals 42 is composed of a copper layer 44 and a plating layer 46 covering the outer surface of the copper layer 44. A conductor layer 26 present at the interface between the solder resist layer 25 and the resin insulation layer 23 is composed of a copper layer 27 and a nickel plating layer 28 covering the outer surface of the copper layer 27.
    Type: Grant
    Filed: May 17, 2011
    Date of Patent: September 30, 2014
    Assignee: NGK Spark Plug Co., Ltd.
    Inventors: Shinnosuke Maeda, Satoshi Hirano
  • Patent number: 8826526
    Abstract: A method of manufacturing a multilayer wiring substrate is provided. A foil of a metal-foil-clad resin insulation material is brought into contact with a foil of a metal-foil-clad support substrate. A peripheral edge portion of the resin insulation material exposed as a result of removal of a peripheral edge portion of the foil is adhered to the foil of the support substrate. A plurality of conductor layers and a plurality of resin insulation layers are laminated so as to obtain a laminate structure having a wiring laminate portion, which is to become the multilayer wiring substrate. The laminate structure is cut along a boundary between the wiring laminate portion and a surrounding portion, and the surrounding portion is removed. The wiring laminate portion is separated from the support substrate along the boundary between the two foils.
    Type: Grant
    Filed: October 26, 2011
    Date of Patent: September 9, 2014
    Assignee: NGK Spark Plug Co., Ltd.
    Inventor: Shinnosuke Maeda
  • Publication number: 20140215782
    Abstract: A plurality of openings are formed in a resin insulation layer on a top surface side of a wiring laminate portion, and a plurality of openings are formed in a resin insulation layer on a bottom surface side thereof. A plurality of connection terminals are disposed to correspond to the openings. Peripheral portions of terminal outer surfaces of the connection terminals are covered by the resin insulation layer on the top surface side, and peripheral portions of terminal outer surfaces of the connection terminals are covered by the resin insulation layer on the bottom surface side. Each of the second-main-surface-side connection terminals has a concave portion at the center of the terminal outer surface, and the deepest portion of the concave portion is located on the interior side in relation to the peripheral portion of the terminal outer surface.
    Type: Application
    Filed: March 28, 2014
    Publication date: August 7, 2014
    Applicant: NGK SPARK PLUG CO., LTD.
    Inventors: Shinnosuke MAEDA, Tetsuo SUZUKI, Satoshi HIRANO
  • Publication number: 20140216796
    Abstract: To provide a multilayer wiring board that ensures sufficient close contact strength between a conformal type conductor and a resin insulating layer. A multilayer wiring board includes a multilayered construction where a plurality of resin insulating layers and a plurality of conductor layers are alternately layered. In each of a plurality of via holes formed in the resin insulating layers, a conformal via conductor is formed to electrically connect between the conductor layers. Filling up parts of the resin insulating layers layered at upper layer side inside of the conformal via conductor forms an anchor portion. The lower end side of the anchor portion bulges larger than the upper end side in the radially outward direction of the via hole.
    Type: Application
    Filed: March 20, 2013
    Publication date: August 7, 2014
    Applicant: NGK SPARK PLUG CO., LTD.
    Inventor: Shinnosuke Maeda
  • Publication number: 20140202740
    Abstract: In a build-up step, a plurality of resin insulation layers and a plurality of conductive layers are alternately laminated in multilayer arrangement on a metal foil separably laminated on a side of a base material, thereby forming a wiring laminate portion. In a drilling step, a plurality of openings are formed in an outermost resin insulation layer through laser drilling so as to expose connection terminals. Subsequently, in a desmear step, smears from inside the openings are removed. In a base-material removing step performed after the build-up step, the base material is removed and the metal foil is exposed.
    Type: Application
    Filed: March 25, 2014
    Publication date: July 24, 2014
    Applicant: NGK SPARK PLUG CO., LTD.
    Inventors: Shinnosuke MAEDA, Tetsuo SUZUKI, Takuya HANDO, Tatsuya ITO, Satoshi HIRANO, Atsuhiko SUGIMOTO
  • Patent number: 8772643
    Abstract: A plurality of openings are formed in a resin insulation layer on a top surface side of a wiring laminate portion, and a plurality of openings are formed in a resin insulation layer on a bottom surface side thereof. A plurality of connection terminals are disposed to correspond to the openings. Peripheral portions of terminal outer surfaces of the connection terminals are covered by the resin insulation layer on the top surface side, and peripheral portions of terminal outer surfaces of the connection terminals are covered by the resin insulation layer on the bottom surface side. Each of the second-main-surface-side connection terminals has a concave portion at the center of the terminal outer surface, and the deepest portion of the concave portion is located on the interior side in relation to the peripheral portion of the terminal outer surface.
    Type: Grant
    Filed: February 16, 2011
    Date of Patent: July 8, 2014
    Assignee: NGK Spark Plug Co., Ltd.
    Inventors: Shinnosuke Maeda, Tetsuo Suzuki, Satoshi Hirano
  • Patent number: 8723328
    Abstract: To provide a multilayer wiring substrate in which the connection reliability of via conductors is enhanced, via holes are formed in a resin interlayer insulation layer which isolates a lower conductor layer from an upper conductor layer, and via conductors are formed in the via holes for connecting the lower conductor layer and the upper conductor layer. The surface of the resin interlayer insulation layer is a rough surface, and the via holes open at the rough surface of the resin interlayer insulation layer. Stepped portions are formed in opening verge regions around the via holes such that the stepped portions are recessed from peripheral regions around the opening verge regions. The stepped portions are higher in surface roughness than the peripheral regions.
    Type: Grant
    Filed: December 13, 2011
    Date of Patent: May 13, 2014
    Assignee: NGK Spark Plug Co., Ltd.
    Inventor: Shinnosuke Maeda
  • Patent number: 8707554
    Abstract: In a build-up step, a plurality of resin insulation layers and a plurality of conductive layers are alternately laminated in multilayer arrangement on a metal foil separably laminated on a side of a base material, thereby forming a wiring laminate portion. In a drilling step, a plurality of openings are formed in an outermost resin insulation layer through laser drilling so as to expose connection terminals. Subsequently, in a desmear step, smears from inside the openings are removed. In a base-material removing step performed after the build-up step, the base material is removed and the metal foil is exposed.
    Type: Grant
    Filed: December 28, 2010
    Date of Patent: April 29, 2014
    Assignee: NGK Spark Plug Co., Ltd.
    Inventors: Shinnosuke Maeda, Tetsuo Suzuki, Takuya Hando, Tatsuya Ito, Satoshi Hirano, Atsuhiko Sugimoto
  • Patent number: 8658905
    Abstract: In a wiring laminate portion of a multilayer wiring substrate, a solder resist layer having a plurality of openings is disposed on a main surface side of the laminate structure, and connection terminals are embedded in an outermost resin insulation layer in contact with the solder resist layer. Each of the connection terminals comprises a copper layer and a metallic layer formed of at least one type of metal other than copper. A main-surface-side circumferential portion of the copper layer is covered by the solder resist layer. At least a portion of the metallic layer is located in a recess in a main-surface-side central portion of the copper layer. At least a portion of the metallic layer is exposed via a corresponding opening.
    Type: Grant
    Filed: March 23, 2011
    Date of Patent: February 25, 2014
    Assignee: NGK Spark Plug Co., Ltd.
    Inventors: Shinnosuke Maeda, Tatsuya Ito, Satoshi Hirano
  • Patent number: 8609995
    Abstract: Disclosed is a manufacturing method of a multilayer wiring board. The multilayer wiring board includes an outer resin insulation layer made of an insulating resin material, containing a filler of inorganic oxide and having an outer surface defining a chip mounting area to which an electronic chip is mounted with an underfill material filled in between the outer resin insulation layer and the electronic chip and holes through which conductor parts are exposed. The manufacturing method includes a hole forming step of forming the holes in the outer resin insulation layer by laser processing, a desmear treatment step of, after the hole forming step, removing smears from inside the holes of the outer resin insulation layer, and a filler reducing step of, after the desmear treatment step, reducing the amount of the filler exposed at the outer surface of the outer resin insulation layer.
    Type: Grant
    Filed: July 18, 2011
    Date of Patent: December 17, 2013
    Assignee: NGK Spark Plug Co., Ltd.
    Inventors: Shinnosuke Maeda, Satoshi Hirano, Yuuki Shiiba