Patents by Inventor Shinobu Nakamura
Shinobu Nakamura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20050022076Abstract: In a digital PLL system, instead of measuring a binarized playback RF signal with a high frequency clock, pulse-length data is generated by using N phase clocks (for example, 16 phase clocks). The pulse-length data is then counted with a virtual channel clock so as to extract run-length data. In this digital PLL system, the number of changing points of an asynchronous signal during an interval between adjacent clocks of the N phase clocks is detected so as to determine phase errors from the detected number of changing points. Phase errors are also determined from the timing relationship between changing points of a signal synchronized with the N phase clocks and each clock of the N phase clocks.Type: ApplicationFiled: June 30, 2004Publication date: January 27, 2005Inventors: Shinobu Nakamura, Mamoru Kudo, Satoru Ooshima, Jun Yamane, Hirofumi Shimizu
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Publication number: 20040264623Abstract: A phase-locked-loop device includes a clock generator for generating a reference clock based on a binarized playback signal and a frequency of run-length data and for generating N-phase clocks using the reference clock, a pulse-length measuring device for measuring a pulse length of the binarized playback signal using the N-phase clocks to output pulse-length data, and a run-length-data extracting device for counting the pulse-length data based on a virtual channel clock to extract run-length data. Pulse-length data is generated using the N-phase clocks (e.g., 16-phase clocks). The pulse-length data is counted based on the virtual channel clock to extract run-length data. Thus, it is not needed to generate a high-frequency clock, and the operating frequency is maintained sufficiently low.Type: ApplicationFiled: June 17, 2004Publication date: December 30, 2004Inventors: Shinobu Nakamura, Mamoru Kudo, Satoru Ooshima, Jun Yamane, Hirofumi Shimizu
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Patent number: 6833538Abstract: In a focusing state determining device for determining a focusing state of a taking lens, an object light entering the taking lens is captured by focusing state determination imaging elements provided separately from a video imaging element, and the focusing state is determined according to luminance signals outputted from the focusing state determination imaging elements. Any error of determination of the focusing state induced by saturation of the luminance signals in imaging an object of high luminance is prevented by adjusting the gains of the image signals outputted from the focusing state determination imaging elements or the charge accumulation times of the focusing state determination imaging elements. High-frequency components are determined from the luminance signals obtained from the focusing state determination imaging elements (A, B, C), and the focus evaluation value is determined by integration thereof.Type: GrantFiled: December 4, 2003Date of Patent: December 21, 2004Assignees: Fuji Photo Optical Co., Ltd., Nippon Hoso KyokaiInventors: Tadashi Sasaki, Masao Wada, Tetsuji Inoue, Ryoji Kumaki, Shinobu Nakamura, Haruo Tominaga, Hiroyuki Horiguchi, Hideaki Sugiura, Masayuki Sugawara
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Patent number: 6822801Abstract: A beam splitter (24)for splitting light in a wavelength range of about 500 nm to about 600 nm is arranged in a relay optical system of a taking lens (12). A green light beam reflected from the beam splitter (24) is directed through a relay lens (R3) to a focusing state determination imaging unit (26). The imaging unit (26) comprises three imaging elements (A, B, C) for capturing the directed green light beam to determine the focusing state. Thus, a device for determining the focusing state of the taking lens is provided, in which the green light beam is separated as an object light for determining the focusing state from the object light entering the taking lens (12), so that the focusing state can be determined with high accuracy on the basis of the high-frequency components of the image signal generated by capturing the green light beam by means of the imaging elements (A, B, C) having different optical path lengths.Type: GrantFiled: December 3, 2003Date of Patent: November 23, 2004Assignees: Fuji Photo Optical Co., Ltd., Nippon Hoso KyokaiInventors: Satoshi Yahagi, Masao Wada, Tetsuji Inoue, Ryoji Kumaki, Shinobu Nakamura, Haruo Tominaga, Hiroyuki Horiguchi, Hideaki Sugiura, Masayuki Sugawara
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Publication number: 20040165276Abstract: A beam splitter (24) for splitting light in a wavelength range of about 500 nm to about 600 nm is arranged in a relay optical system of a taking lens (12). A green light beam reflected from the beam splitter (24) is directed through a relay lens (R3) to a focusing state determination imaging unit (26). The imaging unit (26) comprises three imaging elements (A, B, C) for capturing the directed green light beam to determine the focusing state. Thus, a device for determining the focusing state of the taking lens is provided, in which the green light beam is separated as an object light for determining the focusing state from the object light entering the taking lens (12), so that the focusing state can be determined with high accuracy on the basis of the high-frequency components of the image signal generated by capturing the green light beam by means of the imaging elements (A, B, C) having different optical path lengths.Type: ApplicationFiled: December 3, 2003Publication date: August 26, 2004Inventors: Satoshi Yahagi, Masao Wada, Tetsuji Inoue, Ryoji Kumaki, Shinobu Nakamura, Haruo Tominaga, Hiroyuki Horiguchi, Hideaki Sugiura, Masayuki Sugawara
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Publication number: 20040149882Abstract: In a focusing state determining device for determining a focusing state of a taking lens, an object light entering the taking lens is captured by focusing state determination imaging elements provided separately from a video imaging element, and the focusing state is determined according to luminance signals outputted from the focusing state determination imaging elements. Any error of determination of the focusing state induced by saturation of the luminance signals in imaging an object of high luminance is prevented by adjusting the gains of the image signals outputted from the focusing state determination imaging elements or the charge accumulation times of the focusing state determination imaging elements. High-frequency components are determined from the luminance signals obtained from the focusing state determination imaging elements (A, B, C), and the focus evaluation value is determined by integration thereof.Type: ApplicationFiled: December 4, 2003Publication date: August 5, 2004Inventors: Tadashi Sasaki, Masao Wada, Tetsuji Inoue, Ryoji Kumaki, Shinobu Nakamura, Haruo Tominaga, Hiroyuki Horiguchi, Hideaki Sugiura, Masayuki Sugawara
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Patent number: 6700137Abstract: A light emitting diode device has a reflector member having an approximately semispherical recess. A reflector surface is provided on an inner surface of the recess and a light emitting diode is provided in the recess. The light emitting diode is located at a position so that a part of light beams emitted from the light emitting diode recedes from an optical axis, and another part of the light beams approaches to the optical axis.Type: GrantFiled: July 22, 2002Date of Patent: March 2, 2004Assignee: Citizen Electronic Co., Ltd.Inventors: Megumi Horiuchi, Shinobu Nakamura
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Publication number: 20030094622Abstract: A recess is formed in a substrate, a pair of electrodes is provided on the surface of the substrate including a surface of the recess. An LED is provided on the bottom of the recess. A transparent sealing plate is provided for closing the recess.Type: ApplicationFiled: November 19, 2002Publication date: May 22, 2003Inventors: Megumi Horiuchi, Shinobu Nakamura
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Publication number: 20030020077Abstract: A light emitting diode device has a reflector member having an approximately semispherical recess. A reflector surface is provided on an inner surface of the recess and a light emitting diode is provided in the recess. The light emitting diode is located at a position so that a part of light beams emitted from the light emitting diode recedes from an optical axis, and another part of the light beams approaches to the optical axis.Type: ApplicationFiled: July 22, 2002Publication date: January 30, 2003Applicant: Citizen Electronics Co., Ltd.Inventors: Megumi Horiuchi, Shinobu Nakamura
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Publication number: 20020105365Abstract: In PLL circuits for reproducing a channel clock in synchronism with data read from a disk-shaped recording medium driven for rotation, the frequency dividing ratio of frequency dividers provided in desired signal paths is made changeable according to the reproduced signal format of a CD reproduced signal or a DVD reproduced signal, for example. Although the frequency of the channel clock in synchronism with the reproduced signal differs in different signal formats, the above configuration makes it possible to reproduce the channel clock properly in accordance with a plurality of signal formats only by the operation of changing the frequency dividing ratio in a PLL circuit.Type: ApplicationFiled: December 4, 2001Publication date: August 8, 2002Inventors: Mamoru Kudo, Shinobu Nakamura
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Patent number: 6183278Abstract: A lever member 82, having an operating portion 83, is pivotally mounted on a lever support portion mounted on an upper casing. Retaining projections 84 are elastically-deformably formed respectively on those portions of opposite side surfaces of the operating portion which can be opposed to a pair of support side plates 22, respectively. The retaining projections 84 has elasticity, and therefore a force, required for bringing the retaining projections into and out of retaining engagement with retaining projections formed on the lever support portion, can be reduced, and besides the sense of a click can be obtained. Therefore, the efficiency of the operation, the operability and the reliability can be enhanced.Type: GrantFiled: January 14, 2000Date of Patent: February 6, 2001Assignee: Yazaki CorporationInventors: Hitoshi Hirasawa, Kouji Shigehisa, Chiaki Chida, Yasutaka Suzuki, Kazuhiro Watanabe, Shinobu Nakamura
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Patent number: 6081492Abstract: A disc reproduction device, in which at the time of normal reproduction, a rotational speed of a spindle is detected based on a reproduction signal from the disc by a rotational speed counting circuit, a control signal that makes a speed error with respect to a reference speed zero is given to a first VCO as the control voltage thereof, a reproduction clock is generated while controlling the frequency and phase at a digital PLL circuit by using the oscillation output thereof as the reference frequency of the first PLL circuit containing a second VCO and in which, at the time of access, the control signal to the first VCO is switched to the output signal of the phase comparator by the switch circuit under the control of the controller and a multiple PLL circuit containing the first VCO, phase comparator, LPF, and so forth, is constituted to make the oscillation frequency of the first VCO track the reproduction speed at the destination of access predicted based on the access information by the controller.Type: GrantFiled: March 13, 1998Date of Patent: June 27, 2000Assignee: Sony CorporationInventors: Nobuyuki Asai, Shinobu Nakamura
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Patent number: 5694380Abstract: A disc reproduction apparatus, configured so that a voltage-controlled oscillator is used as a means of giving a reference frequency to an analog phase-locked loop circuit, a control voltage based on a speed error of the rotational speed of a spindle with respect to the reference speed is given to this voltage-controlled oscillator by a rotational speed counting circuit, and a reference clock is produced in the analog phase-locked loop circuit based on the oscillation frequency given by this voltage-controlled oscillator and, at the same time, the reproduction clock PLLCK is produced by the digital phase-locked loop circuit based on this reference clock, whereby the operation becomes stable with respect to rotational outer disturbances and high speed access is enabled.Type: GrantFiled: January 7, 1997Date of Patent: December 2, 1997Assignee: Sony CorporationInventors: Kazutoshi Shimizume, Mamoru Akita, Shinobu Nakamura
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Patent number: 5636192Abstract: A disc reproduction apparatus, configured so that a voltage-controlled oscillator is used as a device of giving a reference frequency to an analog phase-locked loop circuit, a control voltage based on a speed error of the rotational speed of a spindle with respect to the reference speed is given to this voltage-controlled oscillator by a rotational speed counting circuit, and a reference clock is produced in the analog phase-locked loop circuit based on the oscillation frequency given by this voltage-controlled oscillator and, at the same time, the reproduction clock PLLCK is produced by the digital phase-locked loop circuit based on this reference clock, whereby the operation becomes stable with respect to rotational outer disturbances and high speed access is enabled.Type: GrantFiled: November 17, 1995Date of Patent: June 3, 1997Assignee: Sony CorporationInventors: Kazutoshi Shimizume, Mamoru Akita, Shinobu Nakamura
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Patent number: 5508983Abstract: An optical disc player wherein an amount of jitter in a write clock as opposed to a read clock is detected by a jitter counter, a the write clock is counted by a reference counter for the number of frames, the jitter amount is added/subtracted to/from the count output by an adder/subtractor, an offset for the predetermined number of frames is given to a result of the addition/subtraction to generate a subcode synchronizing signal completely synchronized with the read clock. The subcode synchronizing signal is outputted through an output determining circuit only when a reproduction subcode synchronizing signal is found matching by a match detector with the count output of the reference counter twice successively. The device can correctly perform sound linking even for software having successive fixed patterns and perform sound linking without error even if reproduction data at sound linking point is processed with previous-value hold or interpolation.Type: GrantFiled: December 1, 1994Date of Patent: April 16, 1996Assignee: Sony CorporationInventors: Shinobu Nakamura, Mamoru Akita
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Patent number: 5486827Abstract: A modulator suppressing a low-frequency component of a recording waveform while limiting maximum and minimum recording wavelengths, comprising a margin bit generating circuit for generating a most suitable margin bit pattern based on a signal concerning a final recording waveform level of each of n channel bit patterns to be put before a margin bit pattern to be inhibited, control signals concerning a polarity of a cumulative digital sum variation, a control signal coming from a digital sum variation integrating circuit to switch between gains by detecting a magnitude of an absolute value of the digital sum variation, and a signal concerning the cumulative digital sum variation of each of the n channel bit patterns to be put after the above-mentioned margin bit pattern.Type: GrantFiled: October 18, 1993Date of Patent: January 23, 1996Assignee: Sony CorporationInventors: Kazutoshi Shimizume, Shinobu Nakamura
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Patent number: D476961Type: GrantFiled: September 9, 2002Date of Patent: July 8, 2003Assignees: Citizen Electronics Co., Ltd., Kawaguchiko Seimitsu Co., Ltd.Inventors: Megumi Horiuchi, Shinobu Nakamura