Abstract: A semiconductor memory device includes a memory cell region; a memory mat end region; a memory mat including the memory cell region and the memory mat region; a plurality of first silicon regions arranged in the memory cell region; a second silicon region arranged in the memory mat end region; a first conductive layer provided in the memory cell region and the memory mat end region; and wherein upper surface position of the second silicon region in the memory mat end region is higher than the upper surface position of the first silicon region in the memory cell region; and wherein the upper surface position of the first conductive layer in the memory mat end region is higher than the upper surface position of the first conductive layer in the memory cell region.

Abstract: A semiconductor memory device includes a memory cell region; a memory mat end region; a memory mat including the memory cell region and the memory mat region; a plurality of first silicon regions arranged in the memory cell region; a second silicon region arranged in the memory mat end region; a first conductive layer provided in the memory cell region and the memory mat end region; and wherein upper surface position of the second silicon region in the memory mat end region is higher than the upper surface position of the first silicon region in the memory cell region; and wherein the upper surface position of the first conductive layer in the memory mat end region is higher than the upper surface position of the first conductive layer in the memory cell region.

Abstract: An apparatus comprising a memory array comprising wordlines, bit lines, and memory cells. Each memory cell is coupled to an associated one of the wordlines and an associated one of the bit lines. Each of the wordlines is buried in a substrate and comprises a lower conductive material, an upper conductive material, and an oxidation material of the lower conductive material between the lower conductive material and the upper conductive material. In additional embodiments, the apparatus comprises access lines, digit lines, and memory cells. The access lines comprise an oxidized material between a first conductive material and a second conductive material, the oxidized material comprising an oxide of the first conductive material. Methods of forming the apparatus and electronic systems are also disclosed.

Abstract: A method of forming a semiconductor device includes, but is not limited to, the following processes. A first interlayer insulating film is formed. A hole is formed in the first interlayer insulating film. A second interlayer insulating film is formed, which buries the hole and covers the first interlayer insulating film. An interconnect groove is formed by selectively etching the second interlayer insulating film to leave the second interlayer insulating film in the hole. The second interlayer insulating film in the hole is removed.

Abstract: A method of forming a semiconductor device includes, but is not limited to, the following processes. A first interlayer insulating film is formed. A hole is formed in the first interlayer insulating film. A second interlayer insulating film is formed, which buries the hole and covers the first interlayer insulating film. An interconnect groove is formed by selectively etching the second interlayer insulating film to leave the second interlayer insulating film in the hole. The second interlayer insulating film in the hole is removed.