Patents by Inventor Shinsuke Anzai

Shinsuke Anzai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220173287
    Abstract: An image display element includes pixels, a driving circuit substrate, a microlens, and an inter-pixel partition. The pixels are disposed in an array, each including a micro light emitting element. The driving circuit substrate includes a driving circuit configured to supply a current to the micro light emitting element and cause the micro light emitting element to emit light. The microlens is disposed for each of the pixels. The inter-pixel partition is disposed between the pixels and extends from a light emitting surface of the micro light emitting element to the microlens.
    Type: Application
    Filed: December 1, 2021
    Publication date: June 2, 2022
    Inventors: KATSUJI IGUCHI, HIROAKI ONUMA, Shin ITOH, Shinsuke ANZAI
  • Publication number: 20220069186
    Abstract: An image display element provides an image display element including a plurality of micro light-emitting elements arrayed in an array manner, and a semiconductor layer at which a drive circuit is disposed, the drive circuit being configured to supply a current to each of the plurality of micro light-emitting elements to cause light to be emitted, in which a transistor that constitutes the drive circuit and a wiring layer are disposed at a first surface of the semiconductor layer, the plurality of micro light-emitting elements are disposed at a second surface of the semiconductor layer that is an opposite side of the first surface, and the transistor and the wiring layer are electrically coupled to the micro light-emitting elements through a through substrate via that extends through the semiconductor layer.
    Type: Application
    Filed: August 27, 2021
    Publication date: March 3, 2022
    Inventors: Katsuji IGUCHI, Hidenori KAWANISHI, Shinsuke ANZAI
  • Publication number: 20190353806
    Abstract: In a radiation detector, elements that detect radiation and generate charges are arranged in a matrix form. The radiation detector selects and reads out charges, which correspond to a dose of the radiation, row by row at predetermined periods. The radiation detector starts selection of rows from a first row without waiting for completion of readout of one frame which is a period where selection of rows from the first row to a last row is completed.
    Type: Application
    Filed: April 11, 2019
    Publication date: November 21, 2019
    Inventors: TAKAYUKI NAGAOKA, SHINSUKE ANZAI
  • Patent number: 9830026
    Abstract: A touch panel system (611) includes a touch invalidating section (609) which, in a case where a specific point of the sensor panel (601) is continuously touched for a predetermined period of time, invalidates an instruction given, in accordance with the touch, to a host computer (610). Furthermore, the touch invalidating section (609) invalidates an instruction corresponding to a next touch on the point.
    Type: Grant
    Filed: May 8, 2012
    Date of Patent: November 28, 2017
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Masayuki Miyamoto, Manabu Yumoto, Shunsuke Nagasawa, Masayuki Ehiro, Shinsuke Anzai
  • Patent number: 9465492
    Abstract: A touch panel system prevents an incorrect operation caused by an unintended contact of an object with a touch panel while suppressing a decline in sensitivity of detection of presence or absence of a touch on the touch panel. The touch panel system includes a touch invalidating section which, in a case where a specific point of a touch panel is continuously touched for a predetermined period of time, invalidates an instruction that is given, in accordance with the touch, to an electronic device including the touch panel.
    Type: Grant
    Filed: June 4, 2012
    Date of Patent: October 11, 2016
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Masayuki Miyamoto, Manabu Yumoto, Shunsuke Nagasawa, Shinichi Yoshida, Kengo Takahama, Masayuki Ehiro, Shinsuke Anzai
  • Patent number: 9152286
    Abstract: A touch panel system (11) prevents an incorrect operation caused by an unintended contact of an object with a touch panel while suppressing a decline in sensitivity of detection of presence or absence of a touch on the touch panel. The touch panel system (11) includes a touch invalidating section (9) which, in a case where a specific point of a touch panel (1) is continuously touched for a predetermined period of time, invalidates an instruction that is given, in accordance with the touch, to an electronic apparatus including the touch panel (1).
    Type: Grant
    Filed: April 9, 2012
    Date of Patent: October 6, 2015
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Manabu Yumoto, Shunsuke Nagasawa, Masayuki Ehiro, Shinsuke Anzai
  • Publication number: 20140375608
    Abstract: A touch panel system (11) prevents an incorrect operation caused by an unintended contact of an object with a touch panel while suppressing a decline in sensitivity of detection of presence or absence of a touch on the touch panel. The touch panel system (11) includes a touch invalidating section (9) which, in a case where a specific point of a touch panel (1) is continuously touched for a predetermined period of time, invalidates an instruction that is given, in accordance with the touch, to an electronic apparatus including the touch panel (1).
    Type: Application
    Filed: April 9, 2012
    Publication date: December 25, 2014
    Applicant: SHARP KABUSHIKI KAISHA
    Inventors: Manabu Yumoto, Shunsuke Nagasawa, Masayuki Ehiro, Shinsuke Anzai
  • Publication number: 20140160070
    Abstract: A touch panel system prevents an incorrect operation caused by an unintended contact of an object with a touch panel while suppressing a decline in sensitivity of detection of presence or absence of a touch on the touch panel. The touch panel system includes a touch invalidating section which, in a case where a specific point of a touch panel is continuously touched for a predetermined period of time, invalidates an instruction that is given, in accordance with the touch, to an electronic device including the touch panel.
    Type: Application
    Filed: June 4, 2012
    Publication date: June 12, 2014
    Applicant: SHARP KABUSHIKI KAISHA
    Inventors: Masayuki Miyamoto, Manabu Yumoto, Shunsuke Nagasawa, Shinichi Yoshida, Kengo Takahama, Masayuki Ehiro, Shinsuke Anzai
  • Publication number: 20140132562
    Abstract: A touch panel system (611) includes a touch invalidating section (609) which, in a case where a specific point of the sensor panel (601) is continuously touched for a predetermined period of time, invalidates an instruction given, in accordance with the touch, to a host computer (610). Furthermore, the touch invalidating section (609) invalidates an instruction corresponding to a next touch on the point.
    Type: Application
    Filed: May 8, 2012
    Publication date: May 15, 2014
    Applicant: SHARP KABUSHIKI KAISHA
    Inventors: Masayuki Miyamoto, Manabu Yumoto, Shunsuke Nagasawa, Masayuki Ehiro, Shinsuke Anzai
  • Patent number: 8587573
    Abstract: A driving circuit of at least one embodiment includes: m output terminals; m+1 video signal output sections including m+1 output circuits, respectively; a decision section for determining the quality of each of the video signal output sections; and switches for switching connections between the output terminals and the video signal output sections in accordance with a result of determination made by the decision section. When the decision section has determined the ith (i being a natural number of m or less) video signal output section to be defective, the switches connect the jth (j being a natural number of i?1 or less) video signal output section to the jth output terminal and connect the (k+1)th (k being a natural number of i or more to m or less) video signal output section to the kth output terminal. Thus provided is a driving circuit, capable of self-repairing a defective one of the video signal output sections, which has more simplified wires connected to the video signal output sections.
    Type: Grant
    Filed: February 5, 2009
    Date of Patent: November 19, 2013
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Toshio Watanabe, Shinsuke Anzai, Yoshihiro Nakatani, Hiroaki Fujino, Hirofumi Matsui, Masami Mori, Kohichi Hosokawa
  • Patent number: 8416171
    Abstract: In one embodiment of the present invention, a liquid crystal driving semiconductor IC for driving a display panel includes an output terminal connected to the display panel, an output circuit block including a DAC circuit, and a spare output block including a DAC circuit, the DAC circuits and being connectable to the output terminal. The IC includes an op amp for comparing output signal from the DAC circuit with that of the DAC circuit, and judging circuit for judging, based on the comparison result of the op amp, whether the DAC circuit is defective, and switches and for, if the DAC circuit is defective, connecting the spare DAC circuit to the output terminal in replacement of the defective DAC circuit. This provides an IC for driving a display device, which IC has concrete measures to easily detect a defect in an output circuit, and can perform self-healing for the defect in the output circuit.
    Type: Grant
    Filed: May 26, 2008
    Date of Patent: April 9, 2013
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Shunichi Murahashi, Masafumi Katsutani, Hiroaki Fujino, Shinsuke Anzai
  • Publication number: 20110254822
    Abstract: A drive circuit (20) of the present invention includes an output circuit block (30), a spare output circuit block (40), a reference output circuit block (41), a comparing and determining circuit (50), and switching circuits (60) and (61). During self-detection, the switching circuit (60) selects one output circuit from the output circuit block (40), disconnects the selected output circuit from a data line of a display panel (80), and connects the spare output circuit block (40) to the data line of the display panel (80). The comparing and determining circuit (50) compares a test output signal from the selected output circuit with a reference output signal from the reference output circuit block (41) and, in accordance with a result of the comparison, determines whether or not the selected output circuit is defective or not. This achieves a drive circuit capable of detecting a failure in an output circuit while driving a display panel without causing a defect in display.
    Type: Application
    Filed: November 25, 2009
    Publication date: October 20, 2011
    Inventors: Shinsuke Anzai, Hiroaki Fujino, Masafumi Katsutani
  • Publication number: 20110199355
    Abstract: A driving circuit of at least one embodiment includes: m output terminals; m+1 video signal output sections including m+1 output circuits, respectively; a decision section for determining the quality of each of the video signal output sections; and switches for switching connections between the output terminals and the video signal output sections in accordance with a result of determination made by the decision section. When the decision section has determined the ith (i being a natural number of m or less) video signal output section to be defective, the switches connect the jth (j being a natural number of i?1 or less) video signal output section to the jth output terminal and connect the (k+1)th (k being a natural number of i or more to m or less) video signal output section to the kth output terminal. Thus provided is a driving circuit, capable of self-repairing a defective one of the video signal output sections, which has more simplified wires connected to the video signal output sections.
    Type: Application
    Filed: February 5, 2009
    Publication date: August 18, 2011
    Inventors: Toshio Watanabe, Shinsuke Anzai, Yoshihiro Nakatani, Hiroaki Fujino, Hirofumi Matsui, Masami Mori, Kohichi Hosokawa
  • Publication number: 20100225635
    Abstract: In one embodiment of the present invention, a liquid crystal driving semiconductor IC for driving a display panel includes an output terminal connected to the display panel, an output circuit block including a DAC circuit, and a spare output block including a DAC circuit, the DAC circuits and being connectable to the output terminal. The IC includes an op amp for comparing output signal from the DAC circuit with that of the DAC circuit, and judging circuit for judging, based on the comparison result of the op amp, whether the DAC circuit is defective, and switches and for, if the DAC circuit is defective, connecting the spare DAC circuit to the output terminal in replacement of the defective DAC circuit. This provides an IC for driving a display device, which IC has concrete measures to easily detect a defect in an output circuit, and can perform self-healing for the defect in the output circuit.
    Type: Application
    Filed: May 26, 2008
    Publication date: September 9, 2010
    Applicant: SHARP KABUSHIKI KAISHA
    Inventors: Shunichi Murahashi, Masafumi Katsutani, Hiroaki Fujino, Shinsuke Anzai
  • Patent number: 7301827
    Abstract: In a semiconductor memory device for reading out multilevel data in a time-shared manner at different timings, by providing plural control signal lines for controlling the operation timings of the output buffer circuits, the operation timings of output buffer circuits can be displaced, and the number of output buffer circuits operating simultaneously can be decreased, with the result that noise is reduced. Besides, by allowing the output buffer circuit, which outputs data read out early in a time-shared manner, to operate at an early timing, data output is terminated without retarding the operation timing of the output buffer circuit operating at the last timing.
    Type: Grant
    Filed: March 16, 2006
    Date of Patent: November 27, 2007
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Shinsuke Anzai, Masahiko Watanabe, Takahiko Yoshimoto
  • Publication number: 20060215468
    Abstract: In a semiconductor memory device for reading out multilevel data in a time-shared manner at different timings, by providing plural control signal lines for controlling the operation timings of the output buffer circuits, the operation timings of output buffer circuits can be displaced, and the number of output buffer circuits operating simultaneously can be decreased, with the result that noise is reduced. Besides, by allowing the output buffer circuit, which outputs data read out early in a time-shared manner, to operate at an early timing, data output is terminated without retarding the operation timing of the output buffer circuit operating at the last timing.
    Type: Application
    Filed: March 16, 2006
    Publication date: September 28, 2006
    Inventors: Shinsuke Anzai, Masahiko Watanabe, Takahiko Yoshimoto
  • Patent number: 7088626
    Abstract: Two bias circuits which supply a current to a selected memory cell and a reference memory cell have the same circuit constitution. Each bias circuit includes a first active element between a power supply node and a junction node, where a current is controlled to prevent a voltage level at the junction node from fluctuating, a second active element between the power supply node and an output node, where a current is controlled such that a voltage level at the output node is changed in direction opposite to a voltage level at the junction node in other bias circuit, a third active element and a fourth active element between the junction node and a current supply node and between the output node and the current supply node, respectively, where a bias voltage is adjusted.
    Type: Grant
    Filed: February 9, 2005
    Date of Patent: August 8, 2006
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Yasumichi Mori, Takahiko Yoshimoto, Masahiko Watanabe, Shinsuke Anzai, Takeshi Nojima, Munetaka Masaki
  • Patent number: 7020037
    Abstract: A nonvolatile semiconductor memory device includes a readout circuit which reads data stored in a selected memory cell by applying predetermined voltage to the selected memory cell and a reference cell such that currents corresponding to the respective threshold voltage may flow, and comparing the current flowing in the selected memory cell with the current flowing in the reference cell. The readout circuit commonly uses the reference cell set in the same storage state for normal readout and for readout for program verification, and when the predetermined voltage is applied to the selected memory cell and the reference memory cell at the time of the readout for the program verification, it sets an applying condition to the reference memory cell such that its storage state may be shifted more in the program state direction than that in an applying condition at the time of the normal readout.
    Type: Grant
    Filed: February 4, 2005
    Date of Patent: March 28, 2006
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Shinsuke Anzai, Yasumichi Mori
  • Patent number: 6947322
    Abstract: A semiconductor memory device is provided, which comprising a memory cell array comprising a two-value memory region and a multi-value memory region, in which the two-value memory region comprises a plurality of memory cells each storing 1-bit data and the multi-value memory region comprises a plurality of memory cells each storing 2 or more-bit data, and a sense amplifier section common to data read of the two-value memory region and data read of the multi-value memory region, for reading data stored in a selected memory cell by comparing a potential of the selected memory cell with a reference potential.
    Type: Grant
    Filed: July 29, 2003
    Date of Patent: September 20, 2005
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Shinsuke Anzai, Yasumichi Mori, Hidehiko Tanaka
  • Patent number: 6930922
    Abstract: A reading circuit, for reading data from one memory cell of a plurality of memory cells, includes a plurality of division sensing circuits each connected to the one memory cell via a sensing line corresponding thereto among a plurality of sensing lines; and a current-voltage conversion circuit for converting a current flowing through each sensing line into a sensing voltage representing a potential of the corresponding sensing line. Each division sensing circuit includes a current load circuit for supplying a current to the one memory cell via a corresponding sensing line, and a sense amplifier for sensing a potential difference between the corresponding sensing line and a corresponding reference line of a plurality of reference lines. The current load circuit included in at least one division sensing circuit has a current supply capability different from that of the current load circuit included in another division sensing circuits.
    Type: Grant
    Filed: July 29, 2003
    Date of Patent: August 16, 2005
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Yasumichi Mori, Takahiko Yoshimoto, Shinsuke Anzai, Takeshi Nojima