Abstract: An adhesively-laminated core for a stator capable of suppressing an iron loss of an electric motor and also having excellent productivity is provided. The adhesively-laminated core for a stator includes a plurality of electrical steel sheets which are stacked on one another and of which both surfaces are coated with insulation coatings, and adhesion parts which are disposed between the electrical steel sheets adjacent to each other in a stacking direction and cause the electrical steel sheets to be adhered to each other. All sets of the electrical steel sheets adjacent to each other in the stacking direction are adhered via the adhesion parts. An adhesive forming the adhesion parts is a two-agent type acrylic-based adhesive (SGA) which includes an acrylic-based compound, an oxidizer, and a reducer and in which a portion of the acrylic-based compound and the oxidizer are assigned to a first agent and the remaining portion of the acrylic-based compound and the reducer are assigned to a second agent.

Abstract: According to one embodiment, in a semiconductor integrated circuit, the second circuit samples an amplitude of the output second signal at a plurality of timings every given cycle in a period corresponding to a second period of the pattern. The second circuit controls a parameter relating to the frequency characteristic for the first circuit according to a first magnitude relation and a second magnitude relation. The first magnitude relation is a relation between an absolute value of a first amplitude and a first threshold. The first amplitude is an amplitude sampled at a first timing among the plurality of timings. The second magnitude relation is a relation between an absolute value of a second amplitude and the first threshold. The second amplitude is an amplitude sampled at a second timing. The second timing is a timing after the first timing among the plurality of timings.

Abstract: According to one embodiment, in a semiconductor integrated circuit, the second circuit samples an amplitude of the output second signal at a plurality of timings every given cycle in a period corresponding to a second period of the pattern. The second circuit controls a parameter relating to the frequency characteristic for the first circuit according to a first magnitude relation and a second magnitude relation. The first magnitude relation is a relation between an absolute value of a first amplitude and a first threshold. The first amplitude is an amplitude sampled at a first timing among the plurality of timings. The second magnitude relation is a relation between an absolute value of a second amplitude and the first threshold. The second amplitude is an amplitude sampled at a second timing. The second timing is a timing after the first timing among the plurality of timings.

Abstract: According to one embodiment, there is provided a reception apparatus including a preamplifier and a clock recovery circuit. The preamplifier is configured to receive data through a wired transmission path. The clock recovery circuit is configured to sample a value during an edge period and a value during a data period, which are in data received from the preamplifier, by using a reference clock, to execute a phase adjustment to the reference clock with respect to a transition timing of a signal level of the data in a case sampling results is satisfied a particular condition concerning a transition of the signal level of the data, and to execute no phase adjustment to the reference clock with respect to the transition timing of the signal level of the data in a case the sampling results is not satisfied the particular condition.

Abstract: A differential amplifier circuit has a first current circuit comprising a first transistor and a second transistor, and to flow a current depending on a voltage of a first input signal, a second current circuit comprising a third transistor and a fourth transistor, and to flow a current depending on a voltage of a second input signal, a fifth transistor comprising a gate connected to a gate and the drain of the second transistor, and to flow a current that is M times greater than the current flowing between the drain and the source of the second transistor, and a sixth transistor comprising a gate connected to a gate and the drain of the fourth transistor and cascode-connected to the first transistor, and to flow a current that is N times greater than the current flowing between the drain and the source of the fourth transistor.

Abstract: According to an embodiment, a control circuit of an equalizer configured to set a first amount to a linear equalizer, determine a second amount optimizing a non-linear equalizer with respect to a first signal generated by the linear equalizer to which the first amount is set, set the second amount to the non-linear equalizer, update an amount from the first amount to a third amount smaller than the first amount based on a magnitude of the first amount, set the third amount to the linear equalizer, determine a fourth amount optimizing the non-linear equalizer with respect to a second signal generated by the linear equalizer to which the third amount is set, and update an amount from the second amount to the fourth amount.

Abstract: According to one embodiment, there is provided a reception apparatus including a preamplifier and a clock recovery circuit. The preamplifier is configured to receive data through a wired transmission path. The clock recovery circuit is configured to sample a value during an edge period and a value during a data period, which are in data received from the preamplifier, by using a reference clock, to execute a phase adjustment to the reference clock with respect to a transition timing of a signal level of the data in a case sampling results is satisfied a particular condition concerning a transition of the signal level of the data, and to execute no phase adjustment to the reference clock with respect to the transition timing of the signal level of the data in a case the sampling results is not satisfied the particular condition.

Abstract: A differential amplifier circuit has a first current circuit comprising a first transistor and a second transistor, and to flow a current depending on a voltage of a first input signal, a second current circuit comprising a third transistor and a fourth transistor, and to flow a current depending on a voltage of a second input signal, a fifth transistor comprising a gate connected to a gate and the drain of the second transistor, and to flow a current that is M times greater than the current flowing between the drain and the source of the second transistor, and a sixth transistor comprising a gate connected to a gate and the drain of the fourth transistor and cascode-connected to the first transistor, and to flow a current that is N times greater than the current flowing between the drain and the source of the fourth transistor.

Abstract: According to an embodiment, a control circuit of an equalizer configured to set a first amount to a linear equalizer, determine a second amount optimizing a non-linear equalizer with respect to a first signal generated by the linear equalizer to which the first amount is set, set the second amount to the non-linear equalizer, update an amount from the first amount to a third amount smaller than the first amount based on a magnitude of the first amount, set the third amount to the linear equalizer, determine a fourth amount optimizing the non-linear equalizer with respect to a second signal generated by the linear equalizer to which the third amount is set, and update an amount from the second amount to the fourth amount.

Abstract: According to an embodiment, a transmission circuit is configured to transmit a signal to a reception circuit through a transmitting AC coupling element. The reception circuit receives a signal through a receiving AC coupling element. The transmitting AC coupling element is AC coupled to the receiving AC coupling element. The transmission circuit includes a drive signal generation circuit and a drive circuit. The drive signal generation circuit is configured to generate a drive signal in synchronization with a transmission signal to be transmitted. The drive circuit is configured to cause, in response to the drive signal, a drive current to flow through the transmitting AC coupling element in synchronization with a rising edge and a falling edge of the transmission signal during a driving period set in advance.

Abstract: According to an embodiment, a transmission circuit is configured to transmit a signal to a reception circuit through a transmitting AC coupling element. The transmitting AC coupling element is AC coupled to a receiving AC coupling element. The transmission circuit includes a drive signal generation circuit and a drive circuit. The drive signal generation circuit is configured to generate a drive signal in synchronization with a transmission signal to be transmitted. The drive circuit is configured to cause, in response to the drive signal, a drive current to flow between both ends of the transmitting AC coupling element in synchronization with a rising edge and a falling edge of the transmission signal during a driving period set in advance. The drive circuit is configured to apply an applied voltage to both of the ends of the transmitting AC coupling element after the driving period.

Abstract: According to an embodiment, a reception circuit is configured to receive a reception signal from a transmission circuit through a receiving AC coupling element. The transmission circuit transmits a transmission signal through a transmitting AC coupling element. The receiving AC coupling element is AC coupled to the transmitting AC coupling element. The reception circuit includes a variable gain amplifier, a hysteresis circuit and a first control circuit. The variable gain amplifier is configured to amplify the reception signal with a variable gain to output an amplified signal. The hysteresis circuit has hysteresis in an input/output characteristic, and is configured to output an output signal according to the amplified signal. The first control circuit is configured to control the gain so that an amplitude of the amplified signal approximates a reference amplitude.

Abstract: The input circuit includes a first switch control circuit that controls a first switch and a second switch. The first switch control circuit turns off the first switch and the second switch in a first period during which a first input signal and a second input signal are DC signals. The first switch control circuit turns on the first switch and the second switch in a second period during which the first input signal and the second input signal are AC signals.

Abstract: According to an embodiment, a communication system includes a transmitting electrode, a first transmission line, a transmission circuit, a receiving electrode, a second transmission line and a reception circuit. The first transmission line includes one end connected to the transmitting electrode. The transmission circuit is connected to an other end of the first transmission line and configured to transmit a transmission signal. The receiving electrode is capacitively coupled to the transmitting electrode. The second transmission line includes one end connected to the receiving electrode. The reception circuit is connected to an other end of the second transmission line and configured to receive a reception signal via the receiving electrode and the second transmission line. Characteristic impedances of the first transmission line and the second transmission line are greater than an output impedance of the transmission circuit.

Abstract: According to an embodiment, a reception circuit is configured to receive a reception signal from a transmission circuit through a receiving AC coupling element. The transmission circuit transmits a transmission signal through a transmitting AC coupling element. The receiving AC coupling element is AC coupled to the transmitting AC coupling element. The reception circuit includes a variable gain amplifier, a hysteresis circuit and a first control circuit. The variable gain amplifier is configured to amplify the reception signal with a variable gain to output an amplified signal. The hysteresis circuit has hysteresis in an input/output characteristic, and is configured to output an output signal according to the amplified signal. The first control circuit is configured to control the gain so that an amplitude of the amplified signal approximates a reference amplitude.

Abstract: According to an embodiment, a transmission circuit is configured to transmit a signal to a reception circuit through a transmitting AC coupling element. The reception circuit receives a signal through a receiving AC coupling element. The transmitting AC coupling element is AC coupled to the receiving AC coupling element. The transmission circuit includes a drive signal generation circuit and a drive circuit. The drive signal generation circuit is configured to generate a drive signal in synchronization with a transmission signal to be transmitted. The drive circuit is configured to cause, in response to the drive signal, a drive current to flow through the transmitting AC coupling element in synchronization with a rising edge and a falling edge of the transmission signal during a driving period set in advance.

Abstract: According to an embodiment, a transmission circuit is configured to transmit a signal to a reception circuit through a transmitting AC coupling element. The transmitting AC coupling element is AC coupled to a receiving AC coupling element. The transmission circuit includes a drive signal generation circuit and a drive circuit. The drive signal generation circuit is configured to generate a drive signal in synchronization with a transmission signal to be transmitted. The drive circuit is configured to cause, in response to the drive signal, a drive current to flow between both ends of the transmitting AC coupling element in synchronization with a rising edge and a falling edge of the transmission signal during a driving period set in advance. The drive circuit is configured to apply an applied voltage to both of the ends of the transmitting AC coupling element after the driving period.

Abstract: According to an embodiment, a reception circuit receives a reception signal according to a signal transmitted from a transmission electrode through a reception electrode capacitively coupled to the transmission electrode. The reception circuit includes an adder, a hysteresis circuit, a shift register and a feedback signal generator. The adder is configured to add one or more feedback signals to the reception signal. The hysteresis circuit has hysteresis in input and output characteristics, and is configured to output output data according to an output signal of the adder. The shift register is configured to sequentially shift the output data of the hysteresis circuit. The feedback signal generator is configured to generate the feedback signal according to each output data of the shift register.

Abstract: According to an embodiment, a communication system includes a transmitting electrode, a first transmission line, a transmission circuit, a receiving electrode, a second transmission line and a reception circuit. The first transmission line includes one end connected to the transmitting electrode. The transmission circuit is connected to an other end of the first transmission line and configured to transmit a transmission signal. The receiving electrode is capacitively coupled to the transmitting electrode. The second transmission line includes one end connected to the receiving electrode. The reception circuit is connected to an other end of the second transmission line and configured to receive a reception signal via the receiving electrode and the second transmission line. Characteristic impedances of the first transmission line and the second transmission line are greater than an output impedance of the transmission circuit.

Abstract: According to an embodiment, a reception circuit receives a reception signal according to a signal transmitted from a transmission electrode through a reception electrode capacitively coupled to the transmission electrode. The reception circuit includes an adder, a hysteresis circuit, a shift register and a feedback signal generator. The adder is configured to add one or more feedback signals to the reception signal. The hysteresis circuit has hysteresis in input and output characteristics, and is configured to output output data according to an output signal of the adder. The shift register is configured to sequentially shift the output data of the hysteresis circuit. The feedback signal generator is configured to generate the feedback signal according to each output data of the shift register.