Patents by Inventor Shinya Osakabe
Shinya Osakabe has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 10432237Abstract: A multiplexer includes: a low-pass filter that is connected between a common terminal and a first terminal and is formed of one or more first inductors and one or more first capacitors; a bandpass filter that is connected between the common terminal and a second terminal, has a passband higher than a passband of the low-pass filter, and is formed of one or more second inductors and one or more second capacitors; a high-pass filter that is connected between the common terminal and a third terminal, has a passband higher than the passband of the bandpass filter, and is formed of one or more third inductors and one or more third capacitors; and a fourth inductor that has a first end coupled to the common terminal and a second end coupled to the high-pass filter.Type: GrantFiled: October 3, 2018Date of Patent: October 1, 2019Assignee: TAIYO YUDEN CO., LTD.Inventors: Hirotaka Takeuchi, Toshiyuki Saito, Shinya Osakabe
-
Publication number: 20190123771Abstract: A multiplexer includes: a low-pass filter that is connected between a common terminal and a first terminal and is formed of one or more first inductors and one or more first capacitors; a bandpass filter that is connected between the common terminal and a second terminal, has a passband higher than a passband of the low-pass filter, and is formed of one or more second inductors and one or more second capacitors; a high-pass filter that is connected between the common terminal and a third terminal, has a passband higher than the passband of the bandpass filter, and is formed of one or more third inductors and one or more third capacitors; and a fourth inductor that has a first end coupled to the common terminal and a second end coupled to the high-pass filter.Type: ApplicationFiled: October 3, 2018Publication date: April 25, 2019Applicant: TAIYO YUDEN CO., LTD.Inventors: Hirotaka TAKEUCHI, Toshiyuki SAITO, Shinya OSAKABE
-
Publication number: 20170236796Abstract: A bump-equipped electronic component includes a circuit substrate and first and second bumps which are disposed on a principal surface of the circuit substrate and have different cross-sectional areas in a direction parallel or substantially parallel to the principal surface. One of the first and second bumps having a smaller cross-sectional area includes a height adjustment layer disposed in a direction perpendicular or substantially perpendicular to the principal surface.Type: ApplicationFiled: May 5, 2017Publication date: August 17, 2017Inventors: Isao OBU, Shinya OSAKABE
-
Patent number: 9679860Abstract: A bump-equipped electronic component includes a circuit substrate and first and second bumps which are disposed on a principal surface of the circuit substrate and have different cross-sectional areas in a direction parallel or substantially parallel to the principal surface. One of the first and second bumps having a smaller cross-sectional area includes a height adjustment layer disposed in a direction perpendicular or substantially perpendicular to the principal surface.Type: GrantFiled: March 15, 2016Date of Patent: June 13, 2017Assignee: MURATA MANUFACTURING CO., LTD.Inventors: Isao Obu, Shinya Osakabe
-
Publication number: 20160197052Abstract: A bump-equipped electronic component includes a circuit substrate and first and second bumps which are disposed on a principal surface of the circuit substrate and have different cross-sectional areas in a direction parallel or substantially parallel to the principal surface. One of the first and second bumps having a smaller cross-sectional area includes a height adjustment layer disposed in a direction perpendicular or substantially perpendicular to the principal surface.Type: ApplicationFiled: March 15, 2016Publication date: July 7, 2016Inventors: Isao OBU, Shinya OSAKABE
-
Patent number: 9362268Abstract: In a high-frequency circuit, it is necessary to provide galvanic blocking between active elements such as transistors and between an active element and an external terminal, and thus MIM capacitors or the like are used frequently. A MIM capacitor coupled to an external terminal is easily affected by static electricity from outside and causes a problem of electro-static breakdown or the like. In a MIM capacitor formed over a semi-insulating compound semiconductor substrate, a first electrode thereof is coupled to an external pad and to the semi-insulating compound semiconductor substrate, and a second electrode thereof is coupled to the semi-insulating compound semiconductor substrate.Type: GrantFiled: July 12, 2012Date of Patent: June 7, 2016Assignee: RENESAS ELECTRONICS CORPORATIONInventors: Atsushi Kurokawa, Shinya Osakabe
-
Patent number: 9343360Abstract: A bump-equipped electronic component includes a circuit substrate and first and second bumps which are disposed on a principal surface of the circuit substrate and have different cross-sectional areas in a direction parallel or substantially parallel to the principal surface. One of the first and second bumps having a smaller cross-sectional area includes a height adjustment layer disposed in a direction perpendicular or substantially perpendicular to the principal surface.Type: GrantFiled: December 4, 2013Date of Patent: May 17, 2016Assignee: MURATA MANUFACTURING CO., LTD.Inventors: Isao Obu, Shinya Osakabe
-
Patent number: 8824974Abstract: The present invention provides a semiconductor integrated circuit device and a radio frequency module realizing reduction in high-order harmonic distortion or IMD. For example, a so-called antenna switch having a plurality of transistors between an antenna terminal and a plurality of signal terminals is provided with a voltage supply circuit. The voltage supply circuit is a circuit for supplying voltage from a voltage supply terminal to at least two signal terminals in the plurality of signal terminals via resistive elements. With the configuration, antenna voltage dropped due to a leakage or the like can be boosted and, for example, transistors in an off state can be set to a deep off state.Type: GrantFiled: October 22, 2010Date of Patent: September 2, 2014Assignee: Murata Manufacturing Co., Ltd.Inventors: Akishige Nakajima, Yasushi Shigeno, Takashi Ogawa, Shinnichirou Takatani, Shinya Osakabe, Tomoyuki Ishikawa
-
Publication number: 20140151874Abstract: A bump-equipped electronic component includes a circuit substrate and first and second bumps which are disposed on a principal surface of the circuit substrate and have different cross-sectional areas in a direction parallel or substantially parallel to the principal surface. One of the first and second bumps having a smaller cross-sectional area includes a height adjustment layer disposed in a direction perpendicular or substantially perpendicular to the principal surface.Type: ApplicationFiled: December 4, 2013Publication date: June 5, 2014Applicant: MURATA MANUFACTURING CO., LTD.Inventors: Isao OBU, Shinya OSAKABE
-
Patent number: 8385847Abstract: A switching element is provided that realizes an stabilize a potential between the gates of the multi-gates without an increase in the insertion loss, and an antenna switch circuit and a radio frequency module each using the switch element. The switching element includes two ohmic electrodes 39, 40 formed on a semiconductor substrate, at least two gate electrodes 41, 42 disposed between the two ohmic electrodes, and a conductive region 45 disposed between the adjacent gate electrodes among the at least two gate electrodes, a field effective transistor being structured by the two ohmic electrodes, the at least two gate electrodes, and the conductive region. The conductive region has a wider portion that is wider in width than the conductive region interposed between the adjacent gate electrodes on one end thereof. The distance between the adjacent gate electrodes is narrower than the width of the wider portion. Resistors 44, 46 are connected in series between the two ohmic electrodes through the wider portion.Type: GrantFiled: February 25, 2011Date of Patent: February 26, 2013Assignee: Renesas Electronics CorporationInventors: Takashi Ogawa, Shinichiro Takatani, Shigeki Koya, Hiroyuki Takazawa, Shinya Osakabe, Akishige Nakajima, Yasushi Shigeno
-
Publication number: 20130026541Abstract: In a high-frequency circuit, it is necessary to block galvanically between active elements such as transistors and between an active element and an external terminal, and thus MIM capacitors or the like are used frequently. Among these MIM capacitors, one coupled to the external terminal is easily affected by static electricity from outside, which easily causes a problem of electro-static breakdown or the like. The present invention is a semiconductor integrated circuit device formed over a semi-insulating compound semiconductor substrate in which a first electrode of an MIM capacitor electrically coupled to an external pad is electrically coupled to the semi-insulating compound semiconductor substrate, and on the other side, a second electrode of the MIM capacitor is electrically coupled to the semi-insulating compound semiconductor substrate.Type: ApplicationFiled: July 12, 2012Publication date: January 31, 2013Applicant: RENESAS ELECTRONICS CORPORATIONInventors: Atsushi KUROKAWA, Shinya OSAKABE
-
Patent number: 8169008Abstract: The present invention miniaturizes a HEMT element used as a switching element in a radio frequency module. A single gate electrode 17 is formed in an active region defined by an element separation portion 9 on a main surface of a substrate 1 comprising GaAs. The gate electrode 17 is patterned so as to extend in the vertical direction of the page surface between source electrodes 13 and drain electrodes 14, and to extend in left and right directions at other portions. Thus, the ratio of the gate electrode 17 disposed outside the active region is reduced, and the area of a gate pad 17A is reduced.Type: GrantFiled: October 21, 2010Date of Patent: May 1, 2012Assignee: Murata Manufacturing Co., Ltd.Inventors: Masao Yamane, Atsushi Kurokawa, Shinya Osakabe, Eigo Tange, Yasushi Shigeno, Hiroyuki Takazawa
-
Patent number: 7995972Abstract: There are provided a transmission/reception switching circuit which is small in insertion loss and harmonic distortion and allows an increase in the output power of a power amplifier and an electronic component for communication on which the transmission/reception switching circuit is mounted. As an element composing a transmission/reception switching circuit in a wireless communication system, series-connected FETs or a multi-gate FET are used in place of a diode. Gate resistors connected between the individual gate terminals and a control terminal are designed to have resistance values which become progressively smaller from the gate to which a highest voltage is applied toward the gate to which a lowest voltage is applied.Type: GrantFiled: August 5, 2008Date of Patent: August 9, 2011Assignee: Renesas Electronics CorporationInventors: Akishige Nakajima, Takashi Ogawa, Hidenori Suenaga, Eigo Tange, Shinya Osakabe, Yasushi Shigeno
-
Publication number: 20110156983Abstract: A switching element is provided that realizes an stabilize a potential between the gates of the multi-gates without an increase in the insertion loss, and an antenna switch circuit and a radio frequency module each using the switch element. The switching element includes two ohmic electrodes 39, 40 formed on a semiconductor substrate, at least two gate electrodes 41, 42 disposed between the two ohmic electrodes, and a conductive region 45 disposed between the adjacent gate electrodes among the at least two gate electrodes, a field effective transistor being structured by the two ohmic electrodes, the at least two gate electrodes, and the conductive region. The conductive region has a wider portion that is wider in width than the conductive region interposed between the adjacent gate electrodes on one end thereof. The distance between the adjacent gate electrodes is narrower than the width of the wider portion. Resistors 44, 46 are connected in series between the two ohmic electrodes through the wider portion.Type: ApplicationFiled: February 25, 2011Publication date: June 30, 2011Inventors: Takashi Ogawa, Shinichiro Takatani, Shigeki Koya, Hiroyuki Takazawa, Shinya Osakabe, Akishige Nakajima, Yasushi Shigeno
-
Patent number: 7899412Abstract: A switching element is provided that realizes an stabilize a potential between the gates of the multi-gates without an increase in the insertion loss, and an antenna switch circuit and a radio frequency module each using the switch element. The switching element includes two ohmic electrodes 39, 40 formed on a semiconductor substrate, at least two gate electrodes 41, 42 disposed between the two ohmic electrodes, and a conductive region 45 disposed between the adjacent gate electrodes among the at least two gate electrodes, a field effective transistor being structured by the two ohmic electrodes, the at least two gate electrodes, and the conductive region. The conductive region has a wider portion that is wider in width than the conductive region interposed between the adjacent gate electrodes on one end thereof. The distance between the adjacent gate electrodes is narrower than the width of the wider portion. Resistors 44, 46 are connected in series between the two ohmic electrodes through the wider portion.Type: GrantFiled: July 29, 2010Date of Patent: March 1, 2011Assignee: Renesas Electronics CorporationInventors: Takashi Ogawa, Shinichiro Takatani, Shigeki Koya, Hiroyuki Takazawa, Shinya Osakabe, Akishige Nakajima, Yasushi Shigeno
-
Publication number: 20110031533Abstract: The present invention miniaturizes a HEMT element used as a switching element in a radio frequency module. A single gate electrode 17 is formed in an active region defined by an element separation portion 9 on a main surface of a substrate 1 comprising GaAs. The gate electrode 17 is patterned so as to extend in the vertical direction of the page surface between source electrodes 13 and drain electrodes 14, and to extend in left and right directions at other portions. Thus, the ratio of the gate electrode 17 disposed outside the active region is reduced, and the area of a gate pad 17A is reduced.Type: ApplicationFiled: October 21, 2010Publication date: February 10, 2011Applicant: RENESAS ELECTRONICS CORPORATIONInventors: Masao Yamane, Atsushi Kurokawa, Shinya Osakabe, Eigo Tange, Yasushi Shigeno, Hiroyuki Takazawa
-
Publication number: 20110034137Abstract: The present invention provides a semiconductor integrated circuit device and a radio frequency module realizing reduction in high-order harmonic distortion or IMD. For example, a so-called antenna switch having a plurality of transistors between an antenna terminal and a plurality of signal terminals is provided with a voltage supply circuit. The voltage supply circuit is a circuit for supplying voltage from a voltage supply terminal to at least two signal terminals in the plurality of signal terminals via resistive elements. With the configuration, antenna voltage dropped due to a leakage or the like can be boosted and, for example, transistors in an off state can be set to a deep off state.Type: ApplicationFiled: October 22, 2010Publication date: February 10, 2011Applicant: RENESAS ELECTRONICS CORPORATIONInventors: Akishige NAKAJIMA, Yasushi SHIGENO, Takashi OGAWA, Shinnichirou TAKATANI, Shinya OSAKABE, Tomoyuki ISHIKAWA
-
Publication number: 20100297960Abstract: A switching element is provided that realizes an stabilize a potential between the gates of the multi-gates without an increase in the insertion loss, and an antenna switch circuit and a radio frequency module each using the switch element. The switching element includes two ohmic electrodes 39, 40 formed on a semiconductor substrate, at least two gate electrodes 41, 42 disposed between the two ohmic electrodes, and a conductive region 45 disposed between the adjacent gate electrodes among the at least two gate electrodes, a field effective transistor being structured by the two ohmic electrodes, the at least two gate electrodes, and the conductive region. The conductive region has a wider portion that is wider in width than the conductive region interposed between the adjacent gate electrodes on one end thereof. The distance between the adjacent gate electrodes is narrower than the width of the wider portion. Resistors 44, 46 are connected in series between the two ohmic electrodes through the wider portion.Type: ApplicationFiled: July 29, 2010Publication date: November 25, 2010Inventors: Takashi Ogawa, Shinichiro Takatani, Shigeki Koya, Hiroyuki Takazawa, Shinya Osakabe, Akishige Nakajima, Yasushi Shigeno
-
Patent number: 7838914Abstract: The present invention miniaturizes a HEMT element used as a switching element in a radio frequency module. A single gate electrode 17 is formed in an active region defined by an element separation portion 9 on a main surface of a substrate 1 comprising GaAs. The gate electrode 17 is patterned so as to extend in the vertical direction of the page surface between source electrodes 13 and drain electrodes 14, and to extend in left and right directions at other portions. Thus, the ratio of the gate electrode 17 disposed outside the active region is reduced, and the area of a gate pad 17A is reduced.Type: GrantFiled: November 6, 2007Date of Patent: November 23, 2010Assignee: Renesas Electronics CorporationInventors: Masao Yamane, Atsushi Kurokawa, Shinya Osakabe, Eigo Tange, Yasushi Shigeno, Hiroyuki Takazawa
-
Patent number: 7783265Abstract: A switching element is provided that realizes an stabilize a potential between the gates of the multi-gates without an increase in the insertion loss, and an antenna switch circuit and a radio frequency module each using the switch element. The switching element includes two ohmic electrodes 39, 40 formed on a semiconductor substrate, at least two gate electrodes 41, 42 disposed between the two ohmic electrodes, and a conductive region 45 disposed between the adjacent gate electrodes among the at least two gate electrodes, a field effective transistor being structured by the two ohmic electrodes, the at least two gate electrodes, and the conductive region. The conductive region has a wider portion that is wider in width than the conductive region interposed between the adjacent gate electrodes on one end thereof. The distance between the adjacent gate electrodes is narrower than the width of the wider portion. Resistors 44, 46 are connected in series between the two ohmic electrodes through the wider portion.Type: GrantFiled: December 15, 2008Date of Patent: August 24, 2010Assignee: Renesas Technology Corp.Inventors: Takashi Ogawa, Shinichiro Takatani, Shigeki Koya, Hiroyuki Takazawa, Shinya Osakabe, Akishige Nakajima, Yasushi Shigeno