Abstract: The invention provides a CSP type semiconductor device with high reliability. The semiconductor device includes a pad electrode formed on a semiconductor substrate, a first passivation film covering an end portion of the pad electrode and having a first opening on the pad electrode, a plating layer formed on the pad electrode in the first opening, a second passivation film covering an exposed portion of the pad electrode between an end portion of the first passivation film and the plating layer, covering an end portion of the plating layer, and having a second opening on the plating layer, and a conductive terminal formed on the plating layer in the second opening.

Abstract: The invention prevents a pad electrode for external connection of a semiconductor device from being damaged. An electronic circuit, a first pad electrode connected to the electronic circuit, and a second pad electrode connected to the first pad electrode are formed on a semiconductor substrate. A first protection film is formed, covering the first pad electrode and having an opening on the second pad electrode only. A wiring layer is further formed, being connected to the back surface of the first pad electrode through a via hole penetrating the semiconductor substrate and extending from the via hole onto the back surface of the semiconductor substrate.

Abstract: The invention provides a semiconductor device which has a capacitor element therein to achieve size reduction of the device, the capacitor element having larger capacitance than conventional. A semiconductor integrated circuit and pad electrodes are formed on the front surface of a semiconductor substrate. A second insulation film is formed on the side and back surfaces of the semiconductor substrate, and a capacitor electrode is formed between the back surface of the semiconductor substrate and the second insulation film, contacting the back surface of the semiconductor substrate. The second insulation film is covered by wiring layers electrically connected to the pad electrodes, and the wiring layers and the capacitor electrode overlap with the second insulation film being interposed therebetween. Thus, the capacitor electrode, the second insulation film and the wiring layers form capacitors.

Abstract: Cost is reduced and reliability is improved with a CSP type semiconductor device. A glass substrate which works as a supporting plate is bonded through an adhesive to a first surface of a semiconductor wafer on which first wirings are formed. Thickness of the semiconductor wafer is reduced by back-grinding the semiconductor wafer on a second surface of the semiconductor wafer which is opposite to the first surface of the semiconductor wafer. The semiconductor wafer is wet-etched to remove bumps and dips on the second surface of the semiconductor wafer caused during the back-grinding. Then the second surface of the semiconductor wafer is etched to form a tapered groove. The semiconductor wafer is wet-etched to reduce bumps and dips caused by the etching and round a corner of the groove. The wet-etching improves coverage of insulation film, wiring and protection film and enhances yield and reliability of the semiconductor device.

Abstract: The invention is directed to providing a semiconductor device receiving a blue-violet laser, of which the reliability and yield are enhanced. A device element converting a blue-violet laser into an electric signal is formed on a front surface of a semiconductor substrate. An optically transparent substrate is attached to the front surface of the semiconductor substrate with an adhesive layer being interposed therebetween. The adhesive layer contains transparent silicone. Since the front surface of the device element is covered by the optically transparent substrate, foreign substances are prevented from adhering to the front surface of the device element. Furthermore, the adhesive layer is covered by the optically transparent substrate. This prevents the adhesive layer from being exposed to outside air, thereby preventing the degradation of the adhesive layer 6 due to a blue-violet laser.

Abstract: The invention is directed to providing a package type semiconductor device with high reliability and smaller size and a method of manufacturing the same. A semiconductor substrate formed with a device element and a pad electrode on its front surface is prepared. The semiconductor substrate is then selectively etched from its back surface to form an opening. A second insulation film is then formed covering the side and back surfaces of the semiconductor substrate. First and second insulation films on the bottom of the opening are then selectively removed to expose a portion of the pad electrode. A wiring layer is then formed along the side surface of the semiconductor substrate, being electrically connected with the exposed pad electrode. An electrode connect layer is then formed covering the wiring layer. A protection layer is then formed covering the back surface of the semiconductor substrate and having an opening in a region for formation of a sidewall electrode.

Abstract: Cost is reduced and reliability is improved with a CSP type semiconductor device. A glass substrate which works as a supporting plate is bonded through an adhesive to a first surface of a semiconductor wafer on which first wirings are formed. Thickness of the semiconductor wafer is reduced by back-grinding the semiconductor wafer on a second surface of the semiconductor wafer which is opposite to the first surface of the semiconductor wafer. The semiconductor wafer is wet-etched to remove bumps and dips on the second surface of the semiconductor wafer caused during the back-grinding. Then the second surface of the semiconductor wafer is etched to form a tapered groove. The semiconductor wafer is wet-etched to reduce bumps and dips caused by the etching and round a corner of the groove. The wet-etching improves coverage of insulation film, wiring and protection film and enhances yield and reliability of the semiconductor device.

Abstract: A packaged semiconductor device is manufactured by a simplified manufacturing process, and is reduced in cost, in thickness and in size. A device component and a pad electrode connected with the device component are formed on a semiconductor substrate. A supporter is bonded to a top surface of the semiconductor substrate through an adhesive layer. Then, there is formed a protection layer that has an opening at a location corresponding to the pad electrode and covers a side surface and a back surface of the semiconductor substrate. A conductive terminal is formed on the pad electrode at the location corresponding to the opening formed in the protection layer. No wiring layer or conductive terminal is formed on the back surface of the semiconductor substrate. A conductive terminal is formed on a periphery of the supporter outside of and next to the side surface of the semiconductor substrate.

Abstract: The invention provides a semiconductor device that solves a problem of reflection of a pattern of a wiring formed on a back surface of a semiconductor substrate on an output image. A reflection layer is formed between a light receiving element and a wiring layer, that reflects an infrared ray toward a light receiving element the without transmitting it to the wiring layer, the infrared ray entering from a light transparent substrate toward the wiring layer through a semiconductor substrate. The reflection layer is formed at least in a region under the light receiving element uniformly or only under the light receiving element. Alternatively, an anti-reflection layer having a function of absorbing the entering infrared ray to prevent transmission thereof may be formed instead of the reflection layer.

Abstract: This invention provides a semiconductor device that solves a problem that a pattern of a wiring formed on a back surface of a semiconductor substrate is reflected on an output image. A light receiving element (e.g. a CCD, an infrared ray sensor, a CMOS sensor, or an illumination sensor) is formed on a front surface of a semiconductor substrate, and a plurality of ball-shaped conductive terminals is disposed on a back surface of the semiconductor substrate. Each of the conductive terminals is electrically connected to a pad electrode on the front surface of the semiconductor substrate through a wiring layer. The wiring layer and the conductive terminal are formed on the back surface of the semiconductor substrate except in a region overlapping the light receiving element in a vertical direction, and are not disposed in a region overlapping the light receiving element.

Abstract: The invention prevents a pad electrode for external connection of a semiconductor device from being damaged. An electronic circuit, a first pad electrode connected to the electronic circuit, and a second pad electrode connected to the first pad electrode are formed on a semiconductor substrate. A first protection film is formed, covering the first pad electrode and having an opening on the second pad electrode only. A wiring layer is further formed, being connected to the back surface of the first pad electrode through a via hole penetrating the semiconductor substrate and extending from the via hole onto the back surface of the semiconductor substrate.

Abstract: The invention provides a CSP type semiconductor device with high reliability. The semiconductor device includes a pad electrode formed on a semiconductor substrate, a first passivation film covering an end portion of the pad electrode and having a first opening on the pad electrode, a plating layer formed on the pad electrode in the first opening, a second passivation film covering an exposed portion of the pad electrode between an end portion of the first passivation film and the plating layer, covering an end portion of the plating layer, and having a second opening on the plating layer, and a conductive terminal formed on the plating layer in the second opening.

Abstract: The invention provides a CSP type semiconductor device with high reliability. The semiconductor device includes a pad electrode formed on a semiconductor substrate with insulation films interposed therebetween, a plating layer formed on the pad electrode, a conductive terminal formed on the plating layer and electrically connected with the pad electrode, and a first passivation film covering the insulation films and a side end portion of the pad electrode, in which an exposed portion of the pad electrode that causes corrosion is covered by forming a second passivation film so as to cover the first passivation film, the plating layer, and a portion of a sidewall of the conductive terminal.

Abstract: Cost is reduced and reliability is improved with a CSP type semiconductor device. A glass substrate which works as a supporting plate is bonded through an adhesive to a first surface of a semiconductor wafer on which first wirings are formed. Thickness of the semiconductor wafer is reduced by back-grinding the semiconductor wafer on a second surface of the semiconductor wafer which is opposite to the first surface of the semiconductor wafer. The semiconductor wafer is wet-etched to remove bumps and dips on the second surface of the semiconductor wafer caused during the back-grinding. Then the second surface of the semiconductor wafer is etched to form a tapered groove. The semiconductor wafer is wet-etched to reduce bumps and dips caused by the etching and round a corner of the groove. The wet-etching improves coverage of insulation film, wiring and protection film and enhances yield and reliability of the semiconductor device.

Abstract: In a semiconductor device having P type and N type wells formed bordering on a step on a P type semiconductor substrate, a first transistor (precise transistor) having a first linewidth is formed on the P type well in a step lower region while a second transistor (high-voltage transistor) having a second linewidth greater than a linewidth of the first transistor is formed on the N type well in a step higher region.

Abstract: In a semiconductor device having P type and N type wells formed bordering on a step on a P type semiconductor substrate, a first transistor (precise transistor) having a first linewidth is formed on the P type well in a step lower region while a second transistor (high-voltage transistor) having a second linewidth greater than a linewidth of the first transistor is formed on the N type well in a step higher region.