Patents by Inventor Shiryo Yasui

Shiryo Yasui has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Multiprocessor computer system with process execution allocated by process managers in a ring configuration
    Patent number: 5179715
    Abstract: In this computer system, a plurality of processing elements (PE), each having at least two channel processors which manage corresponding communication channels separately, are connected in a ring via the channel processors to form a processing element loop (10). Some of the processing elements are designated as process managers (SM.sub.1 -SM.sub.n) which manage the corresponding process frame groups (20) comprising a predetermined number of process frames. At least one other element is designated as a master manager (MM) which manages those process managers. The respective process managers (SM.sub.1 -SM.sub.n) each allocate a predetermined process to any one process frame of the process frame group (20) which that process manager manages in accordance with each requirement from the master manager (MM) to cause that process frame to execute the predetermined process.
    Type: Grant
    Filed: June 5, 1991
    Date of Patent: January 12, 1993
    Assignee: Toyo Communication Co., Ltd.
    Inventors: Ichiroh Andoh, Tomoyuki Minamiyama, Shigeo Takahashi, Keisuke Yamada, Shiryo Yasui