Patents by Inventor Shishir Goyal
Shishir Goyal has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 11967816Abstract: An input/output (I/O) interface includes a resistance-to-current (R/I) converter; an internal resistor; first, second, and third current sources; first and second diodes; and a comparator. The R/I converter is coupled to an I/O pin and generates an output current based on an external resistance at the I/O pin during an analog operating mode. The internal resistor is coupled to the I/O pin and to ground. The first current source is coupled to the R/I converter circuit. The first diode is coupled to the R/I converter and to the I/O pin. The second current source is coupled to the R/I converter and the first diode and to ground. The second diode is coupled to the I/O pin and to the third current source. The comparator has inputs coupled to the I/O pin and to a reference voltage, and outputs a control signal indicative of a digital operating mode.Type: GrantFiled: April 29, 2021Date of Patent: April 23, 2024Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Ishaan Kubba, Sreeram Nasum Subramanyam, Shishir Goyal, Deep Banerjee
-
Publication number: 20240097437Abstract: A positive overshoot detection circuit comprises a transistor coupled to a current mirror, a reference current source coupled to the current mirror, and a comparator coupled to the reference current source and the current mirror. The comparator output indicates whether the current mirror's current is greater than the reference current source's current. A control input and a current terminal of the transistor are coupled to a clamping circuit. A negative overshoot detection circuit comprises a biasing sub-circuit coupled to a transistor, a resistor coupled to the transistor, and a comparator coupled to the transistor and the resistor. The comparator output indicates whether the transistor is in an on or off state. The biasing sub-circuit is coupled to a clamping circuit. In some implementations, the comparator outputs from the positive and negative overshoot detection circuits are provided to a driver circuit, which modifies its operation.Type: ApplicationFiled: November 29, 2023Publication date: March 21, 2024Inventors: Shishir GOYAL, Lokesh Kumar GUPTA
-
Patent number: 11870246Abstract: A positive overshoot detection circuit comprises a transistor coupled to a current mirror, a reference current source coupled to the current mirror, and a comparator coupled to the reference current source and the current mirror. The comparator output indicates whether the current mirror's current is greater than the reference current source's current. A control input and a current terminal of the transistor are coupled to a clamping circuit. A negative overshoot detection circuit comprises a biasing sub-circuit coupled to a transistor, a resistor coupled to the transistor, and a comparator coupled to the transistor and the resistor. The comparator output indicates whether the transistor is in an on or off state. The biasing sub-circuit is coupled to a clamping circuit. In some implementations, the comparator outputs from the positive and negative overshoot detection circuits are provided to a driver circuit, which modifies its operation.Type: GrantFiled: May 14, 2019Date of Patent: January 9, 2024Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Shishir Goyal, Lokesh Kumar Gupta
-
Patent number: 11502716Abstract: An on-off keying (OOK) receiver circuit includes a band-pass filter and an envelope detector. The band-pass filter includes a high-pass filter, a low-pass filter, and a switch. The high-pass filter is configured to filter an OOK input signal. The low-pass filter is configured to filter an output signal of the high-pass filter. The switch is coupled to an output of the high-pass filter, and is configured to, with each cycle of the OOK input signal, dissipate energy stored in the band-pass filter. The envelope detector is configured to receive a filtered OOK input signal from the band-pass filter, and to generate an OOK output signal based on the filtered OOK input signal.Type: GrantFiled: December 16, 2020Date of Patent: November 15, 2022Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Viswanathan Venkatesh Kumar, Deep Banerjee, Shishir Goyal, Sreeram Nasum Subramanyam
-
Publication number: 20220352706Abstract: An input/output (I/O) interface includes a resistance-to-current (R/I) converter; an internal resistor; first, second, and third current sources; first and second diodes; and a comparator. The R/I converter is coupled to an I/O pin and generates an output current based on an external resistance at the I/O pin during an analog operating mode. The internal resistor is coupled to the I/O pin and to ground. The first current source is coupled to the R/I converter circuit. The first diode is coupled to the R/I converter and to the I/O pin. The second current source is coupled to the R/I converter and the first diode and to ground. The second diode is coupled to the I/O pin and to the third current source. The comparator has inputs coupled to the I/O pin and to a reference voltage, and outputs a control signal indicative of a digital operating mode.Type: ApplicationFiled: April 29, 2021Publication date: November 3, 2022Inventors: Ishaan KUBBA, Sreeram NASUM SUBRAMANYAM, Shishir GOYAL, Deep BANERJEE
-
Publication number: 20220222783Abstract: Embodiments of the present invention provide end-to-end frame time synchronization designed to improve smoothness for displaying images of 3D applications, such as PC gaming applications. Traditionally, an application that renders 3D graphics functions based on the assumption that the average render time will be used as the animation time for a given frame. When this condition is not met, and the render time for a frame does not match the average render time of prior frames, the frames are not captured or displayed at a consistent rate. This invention enables feedback to be provided to the rendering application for adjusting the animation times used to produce new frames, and a post-render queue is used to store completed frames for mitigating stutter and hitches. Flip control is used to sync the display of a rendered frame with the animation time used to generate the frame, thereby producing a smooth, consistent image.Type: ApplicationFiled: March 28, 2022Publication date: July 14, 2022Inventors: Thomas Albert Petersen, Ankan Banerjee, Shishir Goyal, Sau Yan Keith Li, Lars Nordskog, Rouslan Dimitrov
-
Publication number: 20220190866Abstract: An on-off keying (OOK) receiver circuit includes a band-pass filter and an envelope detector. The band-pass filter includes a high-pass filter, a low-pass filter, and a switch. The high-pass filter is configured to filter an OOK input signal. The low-pass filter is configured to filter an output signal of the high-pass filter. The switch is coupled to an output of the high-pass filter, and is configured to, with each cycle of the OOK input signal, dissipate energy stored in the band-pass filter. The envelope detector is configured to receive a filtered OOK input signal from the band-pass filter, and to generate an OOK output signal based on the filtered OOK input signal.Type: ApplicationFiled: December 16, 2020Publication date: June 16, 2022Inventors: Viswanathan Venkatesh KUMAR, Deep BANERJEE, Shishir GOYAL, Sreeram NASUM SUBRAMANYAM
-
Patent number: 11321816Abstract: Embodiments of the present invention provide end-to-end frame time synchronization designed to improve smoothness for displaying images of 3D applications, such as PC gaming applications. Traditionally, an application that renders 3D graphics functions based on the assumption that the average render time will be used as the animation time for a given frame. When this condition is not met, and the render time for a frame does not match the average render time of prior frames, the frames are not captured or displayed at a consistent rate. This invention enables feedback to be provided to the rendering application for adjusting the animation times used to produce new frames, and a post-render queue is used to store completed frames for mitigating stutter and hitches. Flip control is used to sync the display of a rendered frame with the animation time used to generate the frame, thereby producing a smooth, consistent image.Type: GrantFiled: February 17, 2021Date of Patent: May 3, 2022Assignee: NVIDIA CORPORATIONInventors: Thomas Albert Petersen, Ankan Banerjee, Shishir Goyal, Sau Yan Keith Li, Lars Nordskog, Rouslan Dimitrov
-
Publication number: 20210174475Abstract: Embodiments of the present invention provide end-to-end frame time synchronization designed to improve smoothness for displaying images of 3D applications, such as PC gaming applications. Traditionally, an application that renders 3D graphics functions based on the assumption that the average render time will be used as the animation time for a given frame. When this condition is not met, and the render time for a frame does not match the average render time of prior frames, the frames are not captured or displayed at a consistent rate. This invention enables feedback to be provided to the rendering application for adjusting the animation times used to produce new frames, and a post-render queue is used to store completed frames for mitigating stutter and hitches. Flip control is used to sync the display of a rendered frame with the animation time used to generate the frame, thereby producing a smooth, consistent image.Type: ApplicationFiled: February 17, 2021Publication date: June 10, 2021Inventors: Thomas Albert Petersen, Ankan Banerjee, Shishir Goyal, Sau Yan Keith Li, Lars Nordskog, Rouslan Dimitrov
-
Patent number: 10957020Abstract: Embodiments of the present invention provide end-to-end frame time synchronization designed to improve smoothness for displaying images of 3D applications, such as PC gaming applications. Traditionally, an application that renders 3D graphics functions based on the assumption that the average render time will be used as the animation time for a given frame. When this condition is not met, and the render time for a frame does not match the average render time of prior frames, the frames are not captured or displayed at a consistent rate. This invention enables feedback to be provided to the rendering application for adjusting the animation times used to produce new frames, and a post-render queue is used to store completed frames for mitigating stutter and hitches. Flip control is used to sync the display of a rendered frame with the animation time used to generate the frame, thereby producing a smooth, consistent image.Type: GrantFiled: December 3, 2018Date of Patent: March 23, 2021Assignee: NVIDIA CORPORATIONInventors: Thomas Albert Petersen, Ankan Banerjee, Shishir Goyal, Sau Yan Keith Li, Lars Nordskog, Rouslan Dimitrov
-
Publication number: 20200303920Abstract: A positive overshoot detection circuit comprises a transistor coupled to a current mirror, a reference current source coupled to the current mirror, and a comparator coupled to the reference current source and the current mirror. The comparator output indicates whether the current mirror's current is greater than the reference current source's current. A control input and a current terminal of the transistor are coupled to a clamping circuit. A negative overshoot detection circuit comprises a biasing sub-circuit coupled to a transistor, a resistor coupled to the transistor, and a comparator coupled to the transistor and the resistor. The comparator output indicates whether the transistor is in an on or off state. The biasing sub-circuit is coupled to a clamping circuit. In some implementations, the comparator outputs from the positive and negative overshoot detection circuits are provided to a driver circuit, which modifies its operation.Type: ApplicationFiled: May 14, 2019Publication date: September 24, 2020Inventors: Shishir GOYAL, Lokesh Kumar GUPTA
-
Patent number: 10338619Abstract: A digitally-assisted voltage regulator includes a gate driver circuit and a compensation circuit. The voltage regulator digitizes the load profile, and uses the digital information to compensate for process and temperature variations. The voltage regulator outputs a regulated voltage signal and one or more control signals based on a supply voltage and a reference voltage. The gate driver circuit receives the regulated voltage signal and generates a gate driver signal. The compensation circuit receives the control signal and generates first and second compensation signals. The voltage regulator regulates a voltage level of the regulated voltage signal using the regulator compensation signal, and controls a ramp-rate of the gate driver signal using the second compensation signal.Type: GrantFiled: November 7, 2017Date of Patent: July 2, 2019Assignee: NXP B.V.Inventors: Shishir Goyal, Arvind Sherigar
-
Publication number: 20190172181Abstract: Embodiments of the present invention provide end-to-end frame time synchronization designed to improve smoothness for displaying images of 3D applications, such as PC gaming applications. Traditionally, an application that renders 3D graphics functions based on the assumption that the average render time will be used as the animation time for a given frame. When this condition is not met, and the render time for a frame does not match the average render time of prior frames, the frames are not captured or displayed at a consistent rate. This invention enables feedback to be provided to the rendering application for adjusting the animation times used to produce new frames, and a post-render queue is used to store completed frames for mitigating stutter and hitches. Flip control is used to sync the display of a rendered frame with the animation time used to generate the frame, thereby producing a smooth, consistent image.Type: ApplicationFiled: December 3, 2018Publication date: June 6, 2019Inventors: Thomas Albert Petersen, Ankan Banerjee, Shishir Goyal, Sau Yan Keith Li, Lars Nordskog, Rouslan Dimitrov
-
Publication number: 20190138041Abstract: A digitally-assisted voltage regulator includes a gate driver circuit and a compensation circuit. The voltage regulator digitizes the load profile, and uses the digital information to compensate for process and temperature variations. The voltage regulator outputs a regulated voltage signal and one or more control signals based on a supply voltage and a reference voltage. The gate driver circuit receives the regulated voltage signal and generates a gate driver signal. The compensation circuit receives the control signal and generates first and second compensation signals. The voltage regulator regulates a voltage level of the regulated voltage signal using the regulator compensation signal, and controls a ramp-rate of the gate driver signal using the second compensation signal.Type: ApplicationFiled: November 7, 2017Publication date: May 9, 2019Inventors: Shishir Goyal, Arvind Sherigar
-
Patent number: 10234881Abstract: A voltage regulator has a slow loop for providing a regulated DC current and a fast loop for providing a transient current. Feedback information is used to monitor the output voltage and control the current used to generate the output voltage. The voltage regulator does not need a capacitor to create transient current.Type: GrantFiled: November 7, 2017Date of Patent: March 19, 2019Assignee: NXP B.V.Inventors: Shishir Goyal, Arvind Sherigar
-
Patent number: 9329609Abstract: Disclosed is a differential driver circuit including an input module to receive an input signal and split the input signal into high and low components, a first level shifter to receive the high signal component and output a high side input signal to a high side driver, a delay module to receive the low signal component and output a low side input signal to a low side driver, and a multi-voltage domain phase detector to measure a phase difference between the high side input signal and the low side input signal to provide feedback to the input module and output a phase adjusted output signal to match a first delay timing of the first level shifter.Type: GrantFiled: March 18, 2015Date of Patent: May 3, 2016Assignee: NXP B.V.Inventors: Shishir Goyal, Arnoud van der Wel
-
Publication number: 20150212569Abstract: A method includes capturing an interaction of a user of a data processing device therewith at a level of a user space through a process executing on the data processing device, and communicating the captured user interaction as an event from the user space to a kernel space associated with an operating system executing on the data processing device. The method also includes incorporating, through the kernel space, the communicated event as a feedback to an algorithm executing on a processor of the data processing device communicatively coupled to a memory. The algorithm is configured to modify a current performance state of the processor based on threshold levels of utilization of the processor. Further, the method includes automatically switching, based on the algorithm execution, the current performance state of the processor to a higher power state or a lower power state thereof additionally in accordance with the communicated event.Type: ApplicationFiled: January 30, 2014Publication date: July 30, 2015Applicant: NVIDIA CorporationInventors: Shishir Goyal, Rameshwar Shivbhakta