Patents by Inventor Shixi Louis Liu
Shixi Louis Liu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11973008Abstract: Methods and apparatus for a signal isolator having enhanced creepage characteristics. In embodiments, a signal isolator IC package comprises a leadframe including a die paddle having a first surface to support a die and an exposed second surface. A die is supported by a die paddle wherein a width of the second surface of the die paddle is less than a width of the die.Type: GrantFiled: February 14, 2022Date of Patent: April 30, 2024Assignee: Allegro MicroSystems, LLCInventors: Robert A. Briano, Shixi Louis Liu, William P. Taylor
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Publication number: 20240047314Abstract: A current sensor integrated circuit package includes a primary conductor having an input portion and an output portion, both with reduced area edges. Secondary leads each have an exposed portion and an elongated portion that is offset with respect to the exposed portion. A semiconductor die is disposed adjacent to the primary conductor on an insulator portion and at least one magnetic field sensing element is supported by the semiconductor die. A package body includes a first portion enclosing the semiconductor die and a portion of the primary conductor and a second portion enclosing the elongated portion of the plurality of secondary leads. The first package body portion has a first width configured to expose the input and output portions of the primary conductor and the second package body portion has a second width between a first and second package body side edges that is larger than the first width.Type: ApplicationFiled: October 20, 2023Publication date: February 8, 2024Applicant: Allegro MicroSystems, LLCInventors: Robert A. Briano, Shixi Louis Liu
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Publication number: 20240003995Abstract: A current sensor IC includes a lead frame having a die attach pad and elongated leads extending in a single direction with respect to the die attach pad, a semiconductor die having a first surface attached to the die attach pad and a second, opposing surface supporting magnetic field sensing elements, and a non-conductive mold material. A first portion of the mold material encloses the semiconductor die and the die attach pad, a second portion of the mold material encloses a portion of the elongated leads, and the mold material further includes a wing structure between the first portion and the second portion. In assembly, the first portion of the mold material extends into a cutout through a current conductor and the wing structure abuts a surface of the conductor. The current sensor can implement differential sensing based on signals from at least two magnetic field sensing elements.Type: ApplicationFiled: July 1, 2022Publication date: January 4, 2024Applicant: Allegro MicroSystems, LLCInventors: Simon E. Rock, Georges El Bacha, Shaun D. Milano, Loïc André Messier, Alexander Latham, Maxwell McNally, Shixi Louis Liu
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Publication number: 20230314483Abstract: A current sensor IC includes a unitary lead frame having a primary conductor with a first thickness and a secondary lead having a second thickness less than the first thickness. A semiconductor die adjacent to the primary conductor includes a magnetic field sensing circuit to sense a magnetic field associated with the current and generate a secondary signal indicative of the current. An insulation structure is disposed between the primary conductor and the die. A mold material encloses a first portion of the secondary lead and a second portion of the secondary lead that is exposed outside of the package has the second thickness.Type: ApplicationFiled: March 30, 2022Publication date: October 5, 2023Applicant: Allegro MicroSystems, LLCInventors: Shixi Louis Liu, Maxwell McNally, Alexander Latham
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Patent number: 11768230Abstract: A current sensor IC includes a unitary lead frame having a primary conductor with a first thickness and a secondary lead having a second thickness less than the first thickness. A semiconductor die adjacent to the primary conductor includes a magnetic field sensing circuit to sense a magnetic field associated with the current and generate a secondary signal indicative of the current. An insulation structure is disposed between the primary conductor and the die. A mold material encloses a first portion of the secondary lead and a second portion of the secondary lead that is exposed outside of the package has the second thickness.Type: GrantFiled: March 30, 2022Date of Patent: September 26, 2023Assignee: Allegro MicroSystems, LLCInventors: Shixi Louis Liu, Maxwell McNally, Alexander Latham
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Publication number: 20230221355Abstract: A current sensor circuit package includes a primary conductor having an input portion into which a current flows, an output portion from which the current flows, and an exposed portion, wherein the input and output portions have a reduced area edge. A secondary lead has an elongated portion that is offset with respect to the exposed portion of the secondary lead. A semiconductor die is disposed adjacent to the primary conductor on an insulator portion and at least one magnetic field sensing element is supported by the semiconductor die.Type: ApplicationFiled: March 13, 2023Publication date: July 13, 2023Applicant: Allegro MicroSystems, LLCInventor: Shixi Louis Liu
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Patent number: 11644485Abstract: A current sensor integrated circuit configured to sense a current through a current conductor includes a lead frame at least one signal lead, a fan out wafer level package (FOWLP), and a mold material enclosing the FOWLP and a portion of the lead frame. The FOWLP includes a semiconductor die configured to support at least one magnetic field sensing element to sense a magnetic field associated with the current, wherein the semiconductor die has a first surface on which at least one connection pad is accessible, a redistribution layer in contact with the at least one connection pad, and an insulating layer in contact with the redistribution layer, wherein the insulating layer is configured to extend beyond a periphery of the semiconductor die by a minimum distance. The die connection pad is configured to be electrically coupled to the at least one signal lead.Type: GrantFiled: October 7, 2021Date of Patent: May 9, 2023Assignee: Allegro MicroSystems, LLCInventors: Shixi Louis Liu, Paul A. David, Natasha Healey
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Publication number: 20230110671Abstract: A current sensor integrated circuit configured to sense a current through a current conductor includes a lead frame at least one signal lead, a fan out wafer level package (FOWLP), and a mold material enclosing the FOWLP and a portion of the lead frame. The FOWLP includes a semiconductor die configured to support at least one magnetic field sensing element to sense a magnetic field associated with the current, wherein the semiconductor die has a first surface on which at least one connection pad is accessible, a redistribution layer in contact with the at least one connection pad, and an insulating layer in contact with the redistribution layer, wherein the insulating layer is configured to extend beyond a periphery of the semiconductor die by a minimum distance. The die connection pad is configured to be electrically coupled to the at least one signal lead.Type: ApplicationFiled: October 7, 2021Publication date: April 13, 2023Applicant: Allegro MicroSystems, LLCInventors: Shixi Louis Liu, Paul A. David, Natasha Healey
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Publication number: 20230060219Abstract: A packaged current sensor integrated circuit includes a primary conductor having an input portion and an output portion configured to carry a current to be measured by one or more magnetic sensing elements supported by a semiconductor die adjacent to the primary conductor. A method of fabricating the packaged current sensor integrated circuit includes partially encasing the lead frame in a first mold material, applying an insulator to one or more die attach pads, attaching a die to the insulator, electrically connecting the die to secondary leads, and providing a second mold to the subassembly. The package is configured to provide increased voltage isolation.Type: ApplicationFiled: November 8, 2022Publication date: March 2, 2023Applicant: Allegro MicroSystems, LLCInventors: Shixi Louis Liu, Robert A. Briano, Natasha Healey
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Patent number: 11519946Abstract: A packaged current sensor integrated circuit includes a primary conductor having an input portion and an output portion configured to carry a current to be measured by a magnetic sensing element supported by a semiconductor die adjacent to the primary conductor. Each of the input portion and output portion of the primary conductor is exposed from orthogonal sides of the package body. A fault signal may be provided to indicate an overcurrent condition in the integrated current sensor package. The primary current path may be made of a thick lead frame material to reduce the primary current path resistance.Type: GrantFiled: August 23, 2021Date of Patent: December 6, 2022Assignee: Allegro MicroSystems, LLCInventors: Simon E. Rock, Alexander Latham, Robert A. Briano, Shixi Louis Liu
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Patent number: 11519939Abstract: A current sensor integrated circuit (IC) includes a unitary lead frame having at least one first lead having a terminal end, at least one second lead having a terminal end, and a paddle having a first surface and a second opposing surface. A semiconductor die is supported by the first surface of the paddle, wherein the at least one first lead is electrically coupled to the semiconductor die and the at least one second lead is electrically isolated from the semiconductor die. The current sensor IC further includes a first mold material configured to enclose the semiconductor die and the paddle and a second mold material configured to enclose at least a portion of the first mold material, wherein the terminal end of the at least one first lead and the terminal end of the at least one second lead are external to the second mold material.Type: GrantFiled: September 13, 2021Date of Patent: December 6, 2022Assignee: Allegro MicroSystems, LLCInventors: Shixi Louis Liu, Paul A. David, Shaun D. Milano, Rishikesh Nikam, Alexander Latham, Wade Bussing, Natasha Healey, Georges El Bacha
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Publication number: 20220165647Abstract: Methods and apparatus for a signal isolator having enhanced creepage characteristics. In embodiments, a signal isolator IC package comprises a leadframe including a die paddle having a first surface to support a die and an exposed second surface. A die is supported by a die paddle wherein a width of the second surface of the die paddle is less than a width of the die.Type: ApplicationFiled: February 14, 2022Publication date: May 26, 2022Applicant: Allegro MicroSystems, LLCInventors: Robert A. Briano, Shixi Louis Liu, William P. Taylor
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Patent number: 11289406Abstract: Methods and apparatus for a signal isolator having enhanced creepage characteristics. In embodiments, a signal isolator IC package comprises a leadframe including a die paddle having a first surface to support a die and an exposed second surface. A die is supported by a die paddle wherein a width of the second surface of the die paddle is less than a width of the die.Type: GrantFiled: September 18, 2019Date of Patent: March 29, 2022Assignee: Allegro MicroSystems, LLCInventors: Robert A. Briano, Shixi Louis Liu, William P. Taylor
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Publication number: 20210405092Abstract: A current sensor integrated circuit (IC) includes a unitary lead frame having at least one first lead having a terminal end, at least one second lead having a terminal end, and a paddle having a first surface and a second opposing surface. A semiconductor die is supported by the first surface of the paddle, wherein the at least one first lead is electrically coupled to the semiconductor die and the at least one second lead is electrically isolated from the semiconductor die. The current sensor IC further includes a first mold material configured to enclose the semiconductor die and the paddle and a second mold material configured to enclose at least a portion of the first mold material, wherein the terminal end of the at least one first lead and the terminal end of the at least one second lead are external to the second mold material.Type: ApplicationFiled: September 13, 2021Publication date: December 30, 2021Applicant: Allegro MicroSystems, LLCInventors: Shixi Louis Liu, Paul A. David, Shaun D. Milano, Rishikesh Nikam, Alexander Latham, Wade Bussing, Natasha Healey, Georges El Bacha
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Patent number: 11183436Abstract: A power integrated circuit (IC) includes a lead frame comprising a signal lead, a power lead, and a paddle attached to one or more of the signal lead and the power lead, an electrical component supported by the paddle, and a mold material configured to enclose a portion of the lead frame and expose a surface of the paddle, wherein the power lead has a first portion extending from an edge of the mold material outside of the mold material in a first direction and a second portion enclosed by the mold material and extending from the edge of the mold material inside the mold material in a second direction to the paddle, wherein the second direction is substantially opposite to the first direction. In embodiments, the paddle is only attached to the second portion of the power lead.Type: GrantFiled: January 17, 2020Date of Patent: November 23, 2021Assignee: Allegro MicroSystems, LLCInventors: Shixi Louis Liu, Natasha Healey, Rishikesh Nikam
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Patent number: 11150273Abstract: A current sensor integrated circuit (IC) includes a unitary lead frame having at least one first lead having a terminal end, at least one second lead having a terminal end, and a paddle having a first surface and a second opposing surface. A semiconductor die is supported by the first surface of the paddle, wherein the at least one first lead is electrically coupled to the semiconductor die and the at least one second lead is electrically isolated from the semiconductor die. The current sensor IC further includes a first mold material configured to enclose the semiconductor die and the paddle and a second mold material configured to enclose at least a portion of the first mold material, wherein the terminal end of the at least one first lead and the terminal end of the at least one second lead are external to the second mold material.Type: GrantFiled: May 27, 2020Date of Patent: October 19, 2021Assignee: Allegro MicroSystems, LLCInventors: Shixi Louis Liu, Paul A. David, Shaun D. Milano, Rishikesh Nikam, Alexander Latham, Wade Bussing, Natasha Healey, Georges El Bacha
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Publication number: 20210225721Abstract: A power integrated circuit (IC) includes a lead frame comprising a signal lead, a power lead, and a paddle attached to one or more of the signal lead and the power lead, an electrical component supported by the paddle, and a mold material configured to enclose a portion of the lead frame and expose a surface of the paddle, wherein the power lead has a first portion extending from an edge of the mold material outside of the mold material in a first direction and a second portion enclosed by the mold material and extending from the edge of the mold material inside the mold material in a second direction to the paddle, wherein the second direction is substantially opposite to the first direction. In embodiments, the paddle is only attached to the second portion of the power lead.Type: ApplicationFiled: January 17, 2020Publication date: July 22, 2021Applicant: Allegro MicroSystems, LLCInventors: Shixi Louis Liu, Natasha Healey, Rishikesh Nikam
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Publication number: 20210223292Abstract: A current sensor integrated circuit (IC) includes a unitary lead frame having at least one first lead having a terminal end, at least one second lead having a terminal end, and a paddle having a first surface and a second opposing surface. A semiconductor die is supported by the first surface of the paddle, wherein the at least one first lead is electrically coupled to the semiconductor die and the at least one second lead is electrically isolated from the semiconductor die. The current sensor IC further includes a first mold material configured to enclose the semiconductor die and the paddle and a second mold material configured to enclose at least a portion of the first mold material, wherein the terminal end of the at least one first lead and the terminal end of the at least one second lead are external to the second mold material.Type: ApplicationFiled: May 27, 2020Publication date: July 22, 2021Applicant: Allegro MicroSystems, LLCInventors: Shixi Louis Liu, Paul A. David, Shaun D. Milano, Rishikesh Nikam, Alexander Latham, Wade Bussing, Natasha Healey, Georges El Bacha
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Publication number: 20210082789Abstract: Methods and apparatus for a signal isolator having enhanced creepage characteristics. In embodiments, a signal isolator IC package comprises a leadframe including a die paddle having a first surface to support a die and an exposed second surface. A die is supported by a die paddle wherein a width of the second surface of the die paddle is less than a width of the die.Type: ApplicationFiled: September 18, 2019Publication date: March 18, 2021Applicant: Allegro MicroSystems, LLCInventors: Robert A. Briano, Shixi Louis Liu, William P. Taylor
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Patent number: 10753963Abstract: A current sensor integrated circuit includes a lead frame having a primary conductor and at least one secondary lead, a semiconductor die disposed adjacent to the primary conductor, an insulation structure disposed between the primary conductor and the semiconductor die, and a non-conductive insulative material enclosing the semiconductor die, the insulation structure, a first portion of the primary conductor, and a first portion of the at least one secondary lead to form a package. The first portion of the at least one secondary lead (between a first end proximal to the primary conductor and a second end proximal to the second, exposed portion of the at least one secondary lead) has a thickness that is less than a thickness of the second, exposed portion of the least one secondary lead. A distance between the second, exposed portion of the primary conductor and the second, exposed portion of the at least one secondary lead is at least 7.2 mm.Type: GrantFiled: May 30, 2019Date of Patent: August 25, 2020Assignee: Allegro MicroSystems, LLCInventors: Shaun D. Milano, Shixi Louis Liu