Patents by Inventor Shohei Matsushita

Shohei Matsushita has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220310939
    Abstract: The present invention provides an organic photoelectric conversion material such that an increase in the solution viscosity can be suppressed even after long-term storage. This organic photoelectric conversion material comprises Pd, wherein the average number of Pd clusters in a scanning transmission electron microscopic image of a thin film made of the organic photoelectric conversion material is 1500 counts/?m3 or less. It is preferable that the Pd clusters each have a particle diameter of from 1 nm to 20 nm. It is preferable that the organic photoelectric conversion material is a polymer for organic photoelectric conversion material; and it is more preferable that the polymer for organic photoelectric conversion material is a D-A type n-conjugated polymer. It is preferable that the polymer for organic photoelectric conversion material has a thiophene ring.
    Type: Application
    Filed: August 20, 2020
    Publication date: September 29, 2022
    Applicant: SUMITOMO CHEMICAL COMPANY, LIMITED
    Inventors: Yuta ISHINO, Tomoya KASHIKI, Shohei MATSUSHITA, Keiichi KITAMURA
  • Publication number: 20220255007
    Abstract: Provided is a method for producing a ?-conjugated polymer capable of suppressing an increase in dark current of an organic photoelectric conversion element even if the method includes a purification step including heating. A method for producing a ?-conjugated polymer includes: step (I) of heating and dissolving a crude ?-conjugated polymer in a solvent to obtain a polymer solution; and step (II) of precipitating a ?-conjugated polymer from the polymer solution. In step (I), the content of peroxide in the solvent is 0.1% or less in terms of a relative area ratio measured by high-performance liquid chromatography, and the electron spin concentration of the ?-conjugated polymer is 30×1016 Spin/g or less and/or 2.5 times or less the electron spin concentration of the crude ?-conjugated polymer.
    Type: Application
    Filed: July 16, 2020
    Publication date: August 11, 2022
    Applicant: SUMITOMO CHEMICAL COMPANY, LIMITED
    Inventors: Daisuke INOKUCHI, Yuta ISHINO, Tomoya KASHIKI, Shohei MATSUSHITA
  • Publication number: 20140011124
    Abstract: Various embodiments of the present invention relate to particle beam writing to fabricate an integrated circuit on a wafer. In various embodiments, cell projection (CP) cell library information is stored in the form of a data structure. Subsequently, the CP cell library information is referenced by a writing system. The patterns are written on the wafer depending on the referenced CP cell library.
    Type: Application
    Filed: September 9, 2013
    Publication date: January 9, 2014
    Applicant: D2S, INC.
    Inventors: Dmitri Lapanik, Shohei Matsushita, Takashi Mitsuhashi, Zhigang Wu
  • Patent number: 8533640
    Abstract: Various embodiments of the present invention relate to particle beam writing to fabricate an integrated circuit on a wafer. In various embodiments, cell projection (CP) cell library information is stored in the form of a data structure. Subsequently, the CP cell library information is referenced by a writing system. The patterns are written on the wafer depending on the referenced CP cell library.
    Type: Grant
    Filed: September 8, 2012
    Date of Patent: September 10, 2013
    Assignee: D2S, Inc.
    Inventors: Dmitri Lapanik, Shohei Matsushita, Takashi Mitsuhashi, Zhigang Wu
  • Patent number: 8525135
    Abstract: A system and method for improved electron beam writing that is capable of taking design intent, equipment capability and design requirements into consideration. The system and method determines an optimal writing pattern based, at least in part, on the received information.
    Type: Grant
    Filed: August 16, 2010
    Date of Patent: September 3, 2013
    Assignee: Cadence Design Systems, Inc.
    Inventors: Dmitri Lanpanik, Shohei Matsushita, Takashi Mitsuhashi, Zhigang Wu
  • Patent number: 8426832
    Abstract: The present invention increases the number of characters available on a stencil for charged particle beam lithography. A stencil for charged particle beam lithography is disclosed, comprising two character projection (CP) characters, wherein the blanking areas for the two CP characters overlap. A stencil is also disclosed comprising two CP characters with one or more optional characters between the two characters, wherein the optional characters can form meaningful patterns on a surface only in combination with one of the two characters. A stencil is also disclosed wherein the blanking area of a CP character extends beyond the boundary of the stencil's available character area. Methods for design of the aforementioned stencils are also disclosed.
    Type: Grant
    Filed: September 2, 2009
    Date of Patent: April 23, 2013
    Assignee: D2S, Inc.
    Inventors: Kenji Yoshida, Takashi Mitsuhashi, Shohei Matsushita, Larry Lam Chau, Tam Dinh Thanh Nguyen, Donald MacMillen, Akira Fujimura
  • Publication number: 20130007675
    Abstract: Various embodiments of the present invention relate to particle beam writing to fabricate an integrated circuit on a wafer. In various embodiments, cell projection (CP) cell library information is stored in the form of a data structure. Subsequently, the CP cell library information is referenced by a writing system. The patterns are written on the wafer depending on the referenced CP cell library.
    Type: Application
    Filed: September 8, 2012
    Publication date: January 3, 2013
    Applicant: D2S, INC.
    Inventors: Dmitri Lapanik, Shohei Matsushita, Takashi Mitsuhashi, Zhigang Wu
  • Publication number: 20110265049
    Abstract: Various embodiments of the present invention relate to particle beam writing to fabricate an integrated circuit on a wafer. In various embodiments, cell projection (CP) cell library information is stored in the form of a data structure. Subsequently, the CP cell library information is referenced by a writing system. The patterns are written on the wafer depending on the referenced CP cell library.
    Type: Application
    Filed: July 1, 2011
    Publication date: October 27, 2011
    Applicant: D2S, INC.
    Inventors: Dmitri Lapanik, Shohei Matsushita, Takashi Mitsuhashi, Zhigang Wu
  • Publication number: 20110192994
    Abstract: A system and method for improved electron beam writing that is capable of taking design intent, equipment capability and design requirements into consideration. The system and method determines an optimal writing pattern based, at least in part, on the received information.
    Type: Application
    Filed: August 16, 2010
    Publication date: August 11, 2011
    Applicant: CADENCE DESIGN SYSTEMS, INC.
    Inventors: Dmitri LANPANIK, Shohei MATSUSHITA, Takashi MITSUHASHI, Zhigang WU
  • Patent number: 7897522
    Abstract: A method for particle beam lithography, such as electron beam (EB) lithography, includes forming a plurality of cell patterns on a stencil mask and shaping one or more of the cell patterns with a polygonal-shaped contour. A first polygonal-shaped cell pattern is exposed to a particle beam so as to project the first polygonal-shaped cell pattern on a substrate. A second polygonal-shaped cell pattern, having a contour that mates with the contour of the first polygonal-shaped cell pattern, is exposed to the particle beam, such as an electron beam, so as to project the second polygonal-shaped cell pattern adjacent to the first polygonal-shaped cell pattern to thereby form a combined cell with the contour of the first polygonal-shaped cell pattern mated to the contour of the second polygonal-shaped cell pattern. The polygonal-shaped contour of the first and second cell patterns may comprise a rectilinear-shaped contour.
    Type: Grant
    Filed: November 21, 2006
    Date of Patent: March 1, 2011
    Assignee: Cadence Design Systems, Inc.
    Inventors: Akira Fujimura, James Fong, Takashi Mitsuhashi, Shohei Matsushita
  • Patent number: 7777204
    Abstract: A system and method for improved electron beam writing that is capable of taking design intent, equipment capability and design requirements into consideration. The system and method determines an optimal writing pattern based, at least in part, on the received information.
    Type: Grant
    Filed: November 30, 2006
    Date of Patent: August 17, 2010
    Assignee: Cadence Design Systems, Inc.
    Inventors: Dmitri Lapanik, Shohei Matsushita, Takashi Mitsuhashi, Zhigang Wu
  • Patent number: 7772575
    Abstract: A method and system for particle beam lithography, such as electron beam (EB) lithography, is disclosed. The method and system include selecting one of a plurality of cell patterns from a stencil mask and partially exposing the cell pattern to a particle beam, such as an electron beam, so as to selectively project a portion of the cell pattern on a substrate.
    Type: Grant
    Filed: November 21, 2006
    Date of Patent: August 10, 2010
    Assignee: D2S, Inc.
    Inventors: Kenji Yoshida, Takashi Mitsuhashi, Shohei Matsushita, Akira Fujimura
  • Patent number: 7747977
    Abstract: Various embodiments of the present invention relate to particle beam writing to fabricate an integrated circuit on a wafer. In various embodiments, cell projection (CP) cell library information is stored in the form of a data structure. Subsequently, the CP cell library information is referenced by a writing system. The patterns are written on the wafer depending on the referenced CP cell library.
    Type: Grant
    Filed: September 15, 2005
    Date of Patent: June 29, 2010
    Assignee: D2S, Inc.
    Inventors: Dmitri Lapanik, Shohei Matsushita, Takashi Mitsuhashi, Zhigang Wu
  • Publication number: 20090325085
    Abstract: The present invention increases the number of characters available on a stencil for charged particle beam lithography. A stencil for charged particle beam lithography is disclosed, comprising two character projection (CP) characters, wherein the blanking areas for the two CP characters overlap. A stencil is also disclosed comprising two CP characters with one or more optional characters between the two characters, wherein the optional characters can form meaningful patterns on a surface only in combination with one of the two characters. A stencil is also disclosed wherein the blanking area of a CP character extends beyond the boundary of the stencil's available character area. Methods for design of the aforementioned stencils are also disclosed.
    Type: Application
    Filed: September 2, 2009
    Publication date: December 31, 2009
    Applicant: D2S, INC.
    Inventors: Kenji Yoshida, Takashi Mitsuhashi, Shohei Matsushita, Larry Lam Chau, Tam Dinh Thanh Nguyen, Donald MacMillen, Akira Fujimura
  • Patent number: 7579606
    Abstract: A method for particle beam lithography, such as electron beam (EB) lithography, includes predefining a stencil design having a plurality of cell patterns with information from a cell library, fabricating the stencil design, synthesizing a functional description into a logic circuit design after predefining the stencil design so that one or more characteristics of the stencil design are considered during synthesizing of the functional description into the logic circuit design, optimizing the logic circuit design, generating a layout design from the optimized logic circuit design, and forming the logic circuit on a substrate according to the stencil design and the layout design.
    Type: Grant
    Filed: December 1, 2006
    Date of Patent: August 25, 2009
    Assignee: D2S, Inc.
    Inventors: Kenji Yoshida, Takashi Mitsuhashi, Shohei Matsushita, Akira Fujimura
  • Publication number: 20080128637
    Abstract: A method for particle beam lithography, such as electron beam (EB) lithography, includes predefining a stencil design having a plurality of cell patterns with information from a cell library, fabricating the stencil design, synthesizing a functional description into a logic circuit design after predefining the stencil design so that one or more characteristics of the stencil design are considered during synthesizing of the functional description into the logic circuit design, optimizing the logic circuit design, generating a layout design from the optimized logic circuit design, and forming the logic circuit on a substrate according to the stencil design and the layout design.
    Type: Application
    Filed: December 1, 2006
    Publication date: June 5, 2008
    Applicant: Cadence Design Systems, Inc.
    Inventors: Kenji Yoshida, Takashi Mitsuhashi, Shohei Matsushita, Akira Fujimura
  • Publication number: 20080116397
    Abstract: A method and system for particle beam lithography, such as electron beam (EB) lithography, is disclosed. The method and system include selecting one of a plurality of cell patterns from a stencil mask and partially exposing the cell pattern to a particle beam, such as an electron beam, so as to selectively project a portion of the cell pattern on a substrate.
    Type: Application
    Filed: November 21, 2006
    Publication date: May 22, 2008
    Applicant: Cadence Design Systems, Inc.
    Inventors: Kenji Yoshida, Takashi Mitsuhashi, Shohei Matsushita, Akira Fujimura
  • Publication number: 20080116399
    Abstract: A method for particle beam lithography, such as electron beam (EB) lithography, includes forming a plurality of cell patterns on a stencil mask and shaping one or more of the cell patterns with a polygonal-shaped contour. A first polygonal-shaped cell pattern is exposed to a particle beam so as to project the first polygonal-shaped cell pattern on a substrate. A second polygonal-shaped cell pattern, having a contour that mates with the contour of the first polygonal-shaped cell pattern, is exposed to the particle beam, such as an electron beam, so as to project the second polygonal-shaped cell pattern adjacent to the first polygonal-shaped cell pattern to thereby form a combined cell with the contour of the first polygonal-shaped cell pattern mated to the contour of the second polygonal-shaped cell pattern. The polygonal-shaped contour of the first and second cell patterns may comprise a rectilinear-shaped contour.
    Type: Application
    Filed: November 21, 2006
    Publication date: May 22, 2008
    Applicant: Cadence Design Systems, Inc.
    Inventors: Akira Fujimura, James Fong, Takashi Mitsuhashi, Shohei Matsushita
  • Publication number: 20070125967
    Abstract: A system and method for improved electron beam writing that is capable of taking design intent, equipment capability and design requirements into consideration. The system and method determines an optimal writing pattern based, at least in part, on the received information.
    Type: Application
    Filed: November 30, 2006
    Publication date: June 7, 2007
    Applicant: Cadence Design Systems, Inc.
    Inventors: Dmitri Lapanik, Shohei Matsushita, Takashi Mitsuhashi, Zhigang Wu