Patents by Inventor Shoichiro Kasahara

Shoichiro Kasahara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240014798
    Abstract: A resonator device includes: a resonator; an integrated circuit device configured to oscillate the resonator and to generate an oscillation signal; a container accommodating the resonator and the integrated circuit device; and a metal bump bonded to the integrated circuit device and electrically coupling the integrated circuit device and the container. The integrated circuit device includes a pad bonded to the metal bump, and a circuit disposed at a position overlapping the metal bump in a plan view of the pad, and W1/W2?1.08, where W1 represents a width of the pad, and W2 represents a width of the metal bump.
    Type: Application
    Filed: July 6, 2023
    Publication date: January 11, 2024
    Inventors: Taichi Fujinami, Ryuta Nishizawa, Shinya Aoki, Shoichiro Kasahara
  • Patent number: 11699986
    Abstract: An oscillator includes a package having a plurality of external terminals disposed on a mounting surface, a circuit element housed in the package, and a resonator which is housed in the package, and is electrically coupled to the circuit element, wherein the circuit element is electrically coupled to the package with a plurality of pads each of which is bonded to the package via a bump member, the circuit element overlaps at least one of the external terminals in a plan view, and each of the bump members is bonded to the package at a position where at least a part of the bump member does not overlap the plurality of external terminals in the plan view.
    Type: Grant
    Filed: November 23, 2021
    Date of Patent: July 11, 2023
    Inventors: Shoichiro Kasahara, Shinya Aoki
  • Patent number: 11677352
    Abstract: An oscillator includes a package having a plurality of external terminals disposed on a mounting surface, a circuit element housed in the package, and a resonator which is housed in the package, and is electrically coupled to the circuit element, wherein the circuit element is electrically coupled to the package with a plurality of pads each of which is bonded to the package via a bump member, the circuit element has a rectangular shape in a plan view, and at least three of closest ones to four corners of the circuit element out of the bump members are bonded to the package at respective positions overlapping the plurality of external terminals in the plan view.
    Type: Grant
    Filed: November 23, 2021
    Date of Patent: June 13, 2023
    Inventors: Shoichiro Kasahara, Shinya Aoki
  • Patent number: 11563437
    Abstract: An integrated circuit apparatus includes an oscillation circuit that generates an oscillation signal by using a resonator, an output buffer circuit that outputs a clock signal based on the oscillation signal, a DC voltage generation circuit that generates a DC voltage used to generate the oscillation signal or the clock signal, a power source pad to which a power source voltage is supplied, a ground pad to which a ground voltage is supplied, and a clock pad via which the clock signal is outputted. The ground pad and the DC voltage generation circuit are disposed so as to overlap with each other in the plan view.
    Type: Grant
    Filed: January 21, 2022
    Date of Patent: January 24, 2023
    Assignee: SEIKO EPSON CORPORATION
    Inventors: Hisahiro Ito, Shoichiro Kasahara
  • Patent number: 11431343
    Abstract: In the oscillator, a quartz crystal resonator and an oscillation circuit formed in an IC incorporating an inductor are electrically coupled to each other with a resonator interconnection disposed on a surface of a substrate to form an oscillation loop. A conductor layer disposed as an intermediate layer of the substrate is disposed so as to overlap the resonator interconnection and not to overlap the inductor incorporated in the IC in a plan view.
    Type: Grant
    Filed: May 28, 2021
    Date of Patent: August 30, 2022
    Inventors: Shoichiro Kasahara, Hisahiro Ito, Shinya Aoki
  • Publication number: 20220239299
    Abstract: An integrated circuit apparatus includes an oscillation circuit that generates an oscillation signal by using a resonator, an output buffer circuit that outputs a clock signal based on the oscillation signal, a DC voltage generation circuit that generates a DC voltage used to generate the oscillation signal or the clock signal, a power source pad to which a power source voltage is supplied, a ground pad to which a ground voltage is supplied, and a clock pad via which the clock signal is outputted. The ground pad and the DC voltage generation circuit are disposed so as to overlap with each other in the plan view.
    Type: Application
    Filed: January 21, 2022
    Publication date: July 28, 2022
    Inventors: Hisahiro Ito, Shoichiro Kasahara
  • Publication number: 20220166404
    Abstract: An oscillator includes a package having a plurality of external terminals disposed on a mounting surface, a circuit element housed in the package, and a resonator which is housed in the package, and is electrically coupled to the circuit element, wherein the circuit element is electrically coupled to the package with a plurality of pads each of which is bonded to the package via a bump member, the circuit element overlaps at least one of the external terminals in a plan view, and each of the bump members is bonded to the package at a position where at least a part of the bump member does not overlap the plurality of external terminals in the plan view.
    Type: Application
    Filed: November 23, 2021
    Publication date: May 26, 2022
    Inventors: Shoichiro KASAHARA, Shinya AOKI
  • Publication number: 20220166378
    Abstract: An oscillator includes a package having a plurality of external terminals disposed on a mounting surface, a circuit element housed in the package, and a resonator which is housed in the package, and is electrically coupled to the circuit element, wherein the circuit element is electrically coupled to the package with a plurality of pads each of which is bonded to the package via a bump member, the circuit element has a rectangular shape in a plan view, and at least three of closest ones to four corners of the circuit element out of the bump members are bonded to the package at respective positions overlapping the plurality of external terminals in the plan view.
    Type: Application
    Filed: November 23, 2021
    Publication date: May 26, 2022
    Inventors: Shoichiro KASAHARA, Shinya AOKI
  • Publication number: 20220052250
    Abstract: A vibrator device includes a package including a base that is a semiconductor substrate and a lid that is a semiconductor substrate and has a housing section, a vibrator element and a passive element housed in the housing section and placed at the base, an oscillation circuit placed at the base and electrically coupled to the vibrator element, and a circuit that is placed at the base or the lid, is electrically coupled to the passive element, and operates based on an oscillation signal from the oscillation circuit.
    Type: Application
    Filed: August 11, 2021
    Publication date: February 17, 2022
    Inventor: Shoichiro KASAHARA
  • Publication number: 20220052668
    Abstract: A vibrator device includes a package including a base that is a semiconductor substrate and a lid that is a semiconductor substrate and has a housing section, a vibrator element and a passive element housed in the housing section and placed at the base, an oscillation circuit placed at the base and electrically coupled to the vibrator element, and a mounting terminal placed at the package and electrically coupled to the passive element, and at least one of the base and the lid is coupled to fixed potential.
    Type: Application
    Filed: August 11, 2021
    Publication date: February 17, 2022
    Inventor: Shoichiro KASAHARA
  • Publication number: 20210376840
    Abstract: In the oscillator, a quartz crystal resonator and an oscillation circuit formed in an IC incorporating an inductor are electrically coupled to each other with a resonator interconnection disposed on a surface of a substrate to form an oscillation loop. A conductor layer disposed as an intermediate layer of the substrate is disposed so as to overlap the resonator interconnection and not to overlap the inductor incorporated in the IC in a plan view.
    Type: Application
    Filed: May 28, 2021
    Publication date: December 2, 2021
    Inventors: Shoichiro KASAHARA, Hisahiro ITO, Shinya AOKI
  • Patent number: 10742169
    Abstract: An oscillator includes a resonator and an integrated circuit element. The resonator includes a resonator element and a resonator element container accommodating the resonator element. The integrated circuit element includes an inductor. The resonator and the integrated circuit element are stacked on each other. The resonator includes a metal member, and the metal member does not overlap the inductor when viewed in a plan view.
    Type: Grant
    Filed: November 26, 2018
    Date of Patent: August 11, 2020
    Assignee: SEIKO EPSON CORPORATION
    Inventors: Hisahiro Ito, Tetsuya Otsuki, Shoichiro Kasahara
  • Publication number: 20190165732
    Abstract: An oscillator includes a resonator and an integrated circuit element. The resonator includes a resonator element and a resonator element container accommodating the resonator element. The integrated circuit element includes an inductor. The resonator and the integrated circuit element are stacked on each other. The resonator includes a metal member, and the metal member does not overlap the inductor when viewed in a plan view.
    Type: Application
    Filed: November 26, 2018
    Publication date: May 30, 2019
    Applicant: SEIKO EPSON CORPORATION
    Inventors: Hisahiro ITO, Tetsuya OTSUKI, Shoichiro KASAHARA
  • Patent number: 9984991
    Abstract: In order to reduce crosstalk between analog and digital signals, a circuit device includes a vibrator element, a semiconductor device, and a package. In the semiconductor device, an analog pad is provided along a first side facing in a first direction when the semiconductor device is seen in plan view. In addition, a digital pad is provided along aside facing in a second direction opposite to the first direction, that is, a second side facing the first side. In the package, an analog terminal which is connected to the analog pad is provided on a first side of the package facing in the first direction. In addition, a digital terminal which is connected to the digital pad is provided on a second side of the package facing in the second direction.
    Type: Grant
    Filed: July 16, 2015
    Date of Patent: May 29, 2018
    Assignee: Seiko Epson Corporation
    Inventors: Hisahiro Ito, Shoichiro Kasahara
  • Patent number: 9564875
    Abstract: In order to achieve a circuit device capable of stably supplying an antenna with electric power in a broad power range to output a transmission signal, the circuit device includes a current source adapted to supply a first current in a first operation mode, and supply a second current higher than the first current in a second operation mode, and a drive section supplied with the electric power from the current source, and adapted to perform drive for outputting a transmission signal to an antenna via a matching circuit.
    Type: Grant
    Filed: July 14, 2015
    Date of Patent: February 7, 2017
    Assignee: Seiko Epson Corporation
    Inventors: Minoru Kozaki, Shoichiro Kasahara
  • Publication number: 20160020751
    Abstract: In order to achieve a circuit device capable of stably supplying an antenna with electric power in a broad power range to output a transmission signal, the circuit device includes a current source adapted to supply a first current in a first operation mode, and supply a second current higher than the first current in a second operation mode, and a drive section supplied with the electric power from the current source, and adapted to perform drive for outputting a transmission signal to an antenna via a matching circuit.
    Type: Application
    Filed: July 14, 2015
    Publication date: January 21, 2016
    Inventors: Minoru KOZAKI, Shoichiro KASAHARA
  • Publication number: 20160020379
    Abstract: In order to reduce crosstalk between analog and digital signals, a circuit device includes a vibrator element, a semiconductor device, and a package. In the semiconductor device, an analog pad is provided along a first side facing in a first direction when the semiconductor device is seen in plan view. In addition, a digital pad is provided along aside facing in a second direction opposite to the first direction, that is, a second side facing the first side. In the package, an analog terminal which is connected to the analog pad is provided on a first side of the package facing in the first direction. In addition, a digital terminal which is connected to the digital pad is provided on a second side of the package facing in the second direction.
    Type: Application
    Filed: July 16, 2015
    Publication date: January 21, 2016
    Inventors: Hisahiro ITO, Shoichiro KASAHARA
  • Patent number: 7805553
    Abstract: An integrated circuit device includes a common transceiver macrocell including a circuit necessary for host operation and a circuit necessary for device operation. The common transceiver macrocell includes an analog front-end circuit and a high-speed logic circuit. The high-speed logic circuit includes a parallel/serial conversion circuit, a first parallel interface which serves as an interface between an external circuit and the parallel/serial conversion circuit, a sampling clock generation circuit, a serial/parallel conversion circuit, and a second parallel interface which serves as an interface between the serial/parallel conversion circuit and the external circuit.
    Type: Grant
    Filed: November 22, 2006
    Date of Patent: September 28, 2010
    Assignee: Seiko Epson Corporation
    Inventors: Shoichiro Kasahara, Fumikazu Komatsu, Mitsuaki Sawada, Yoshiyuki Kamihara, Takuya Ishida
  • Patent number: 7747807
    Abstract: A host controller includes a disconnection detection circuit 52 which compares a voltage level of a first differential signal DP of first and second differential signals DP and DM making up a differential signal pair corresponding to a given range in a frame packet with a comparison voltage CV, compares a voltage level of the second differential signal DM corresponding to a given range in the frame packet with the comparison voltage CV, and detects that a host and a device have been disconnected when the voltage level of at least one of the first and second differential signals DP and DM corresponding to the given range is higher than the comparison voltage CV.
    Type: Grant
    Filed: August 7, 2006
    Date of Patent: June 29, 2010
    Assignee: Seiko Epson Corporation
    Inventors: Fumikazu Komatsu, Shoichiro Kasahara, Mitsuaki Sawada
  • Patent number: 7627845
    Abstract: A macrocell including a physical layer circuit includes a transmitter circuit and a receiver circuit connected with pads for differential signals DP and DM. The transmitter circuit includes a transmission driver which drives a signal line for the DP and a transmission driver which drives a signal line for the DM. When a direction from a side SD1 to a side SD3 of the macrocell is defined as a first direction, the transmission drivers are disposed on the side of the pads for the DP and DM in the first direction and are disposed line-symmetrically about a line SYL, and the receiver circuit is disposed on the side of the transmitter circuit in the first direction. A routing region of signal lines SLR1 and SLR2 for connecting the receiver circuit with the pads for the DP and DM is provided in the region between the transmission drivers.
    Type: Grant
    Filed: February 21, 2008
    Date of Patent: December 1, 2009
    Assignee: Seiko Epson Corporation
    Inventors: Fumikazu Komatsu, Shoichiro Kasahara, Mitsuaki Sawada