Abstract: An upstream allocation circuit (14) and a downstream allocation circuit (15) are provided in an OLT (1). For example, a superimposed frame obtained by bundling upstream frames (upstream control frames+upstream data frames) from all ONUS is input to the upstream allocation circuit (14) via a frame reproduction circuit (12-1). The superimposed frame may be generated at the stage of optical signals or generated after converting optical signals into electrical signals. The upstream allocation circuit (14) allocates each of the upstream control frames bundled into the superimposed frame to a predetermined PON control circuit (13) based on information (PON port number or LLID) added to the frames. The downstream allocation circuit (15) allocates, to a preset frame reproduction circuit (12), each downstream control frames output from the PON control circuits (13).

Abstract: A selection and distribution circuit (13) is provided between N optical transceivers (11) and one PON control circuit (12). The selection and distribution circuit (13) selects the optical transceiver (11) corresponding to an upstream frame that time-divisionally arrives, thereby transferring the upstream frame opto-electrically converted by the transceiver (11) to the PON control circuit (12) and distributing a downstream frame from the PON control circuit (12) to each optical transceiver (11). A power supply control circuit (23) stops power supply to at least one of one of optical transceivers (11) that are not used to transfer the frame of the optical transceivers (11) and a circuit that is not used to transfer the frame in the selection and distribution circuit (13). This can reduce the system cost per ONU in the optical transmission system.

Abstract: An upstream allocation circuit (14) and a downstream allocation circuit (15) are provided in an OLT (1). For example, a superimposed frame obtained by bundling upstream frames (upstream control frames+upstream data frames) from all ONUS is input to the upstream allocation circuit (14) via a frame reproduction circuit (12-1). The superimposed frame may be generated at the stage of optical signals or generated after converting optical signals into electrical signals. The upstream allocation circuit (14) allocates each of the upstream control frames bundled into the superimposed frame to a predetermined PON control circuit (13) based on information (PON port number or LLID) added to the frames. The downstream allocation circuit (15) allocates, to a preset frame reproduction circuit (12), each downstream control frames output from the PON control circuits (13).

Abstract: A selection and distribution circuit (13) is provided between N optical transceivers (11) and one PON control circuit (12). The selection and distribution circuit (13) selects the optical transceiver (11) corresponding to an upstream frame that time-divisionally arrives, thereby transferring the upstream frame opto-electrically converted by the transceiver (11) to the PON control circuit (12) and distributing a downstream frame from the PON control circuit (12) to each optical transceiver (11). A power supply control circuit (23) stops power supply to at least one of one of optical transceivers (11) that are not used to transfer the frame of the optical transceivers (11) and a circuit that is not used to transfer the frame in the selection and distribution circuit (13). This can reduce the system cost per ONU in the optical transmission system.

Abstract: A write preference determination unit (30A) compares a reception rate of packets received from the lines of a first network (NW1) with a reception rate threshold for write preference determination, and in a case where the reception rate exceeds the reception rate threshold, determines that preference of a write operation is necessary. A write preference control unit (30B) increases, out of a total access bandwidth of a packet buffer (BUF), a write bandwidth for a packet write operation to the packet buffer (BUF) as compared to a read bandwidth for a packet read operation from the packet buffer (BUF) in a case where the write preference determination unit (30A) determines that the preference is necessary, thereby preferentially executing the packet write operation to the packet buffer. This suppresses occurrence of linked discard of reception packets caused by a shortage of the write bandwidth.

Abstract: A write preference determination unit (30A) compares a reception rate of packets received from the lines of a first network (NW1) with a reception rate threshold for write preference determination, and in a case where the reception rate exceeds the reception rate threshold, determines that preference of a write operation is necessary. A write preference control unit (30B) increases, out of a total access bandwidth of a packet buffer (BUF), a write bandwidth for a packet write operation to the packet buffer (BUF) as compared to a read bandwidth for a packet read operation from the packet buffer (BUF) in a case where the write preference determination unit (30A) determines that the preference is necessary, thereby preferentially executing the packet write operation to the packet buffer. This suppresses occurrence of linked discard of reception packets caused by a shortage of the write bandwidth.

Abstract: Identifier information (LLID) of an ONU and transfer instruction information indicating a transmission system as the output destination of a downstream frame are registered in a table (22) in correspondence with each of the destination IDs of the ONUs or user apparatuses connected to the ONUs. Upon receiving a downstream frame from a host apparatus, a frame transfer processing unit (20) acquires an LLID and transfer instruction information corresponding to the destination ID of the downstream frame from the table (22).

Abstract: In a control frame processing unit (14), the number of control frames from a frame demultiplexing unit (13) is counted for each of LLIDs given to the control frames. If the number of frames during a predetermined count period is equal to or smaller than a preset threshold, some or all of the control frames are written in a storage device (30) as processing data. When the number of frames has exceeded the threshold, writing data of the control frames having the LLID in the storage device is stopped. Hence, even when the number of control frames from ONUs increases, software processing can be executed properly.

Abstract: Out of one constantly fed block (B0) and one power saving block (B1) provided by dividing in advance circuit units constituting an OLT (10), a power supply control unit (40) constantly supplies power to circuit units belonging to the constantly fed block. For circuit units belonging to the power saving block, the power supply control unit starts power supply to the power saving block starts in synchronism with the start of the period of an upstream bandwidth allocated to each ONU, and stops the power supply to the power saving block in synchronism with the end of the period of the upstream bandwidth. The power supply control unit starts power supply at a timing specified based on the start timing of the upstream bandwidth, and stops the power supply at a timing decided based on the end timing of the upstream bandwidth. This reduces the power consumption of an overall OLT.

Abstract: In a control frame processing unit (14), the number of control frames from a frame demultiplexing unit (13) is counted for each of LLIDs given to the control frames. If the number of frames during a predetermined count period is equal to or smaller than a preset threshold, some or all of the control frames are written in a storage device (30) as processing data. When the number of frames has exceeded the threshold, writing data of the control frames having the LLID in the storage device is stopped. Hence, even when the number of control frames from ONUs increases, software processing can be executed properly.

Abstract: Identifier information (LLID) of an ONU and transfer instruction information indicating a transmission system as the output destination of a downstream frame are registered in a table (22) in correspondence with each of the destination IDs of the ONUs or user apparatuses connected to the ONUs. Upon receiving a downstream frame from a host apparatus, a frame transfer processing unit (20) acquires an LLID and transfer instruction information corresponding to the destination ID of the downstream frame from the table (22).

Abstract: By using a combination of a plurality of completely unequally spaced channel allocations, the influence of four wave mixing is mitigated even while it is incompletely unequally spaced channel allocation, and it is possible both to decrease the occupied bandwidth and increase the number of channels. A plurality of completely unequally spacing channel allocations are combined, and the number of channels changes depending on the amount of scattering of an optical fiber and the frequency that there exists zero dispersion wavelengths on a transmission path. The completely unequally spaced channel allocations of N1-channels in a first wavelength region including the zero dispersion wavelength &lgr;0 or the mode zero dispersion wavelength &lgr;A are partitioned, and then in sequence the completely unequally spaced channel allocation of N2-, N3-, . . . , channels is partitioned, and the wavelength interval of N channels is set by combining all or a part thereof (where N1≧N224 . . . >Nj≧Nk−1≧Nk).