Patents by Inventor Shota MIKI
Shota MIKI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11955959Abstract: A parallel driving device that drives parallel-connected semiconductor elements includes a control unit and a gate driving circuit. The control unit detects a temperature difference between the semiconductor elements on the basis of detected values by temperature sensors that detect temperatures of the individual semiconductor elements. The control unit generates a control signal for changing the timing at which to turn on a first semiconductor element specified from the semiconductor elements on the basis of the temperature difference. The gate driving circuit generates a first driving signal for driving the semiconductor elements, and generates a second driving signal that is the first driving signal delayed on the basis of the control signal, and applies the second driving signal to the first semiconductor element.Type: GrantFiled: May 29, 2019Date of Patent: April 9, 2024Assignee: MITSUBISHI ELECTRIC CORPORATIONInventors: Yasushi Nakayama, Yoshiko Tamada, Takayoshi Miki, Shota Morisaki, Yukio Nakashima, Kenta Uchida, Keisuke Kimura, Tomonobu Mihara
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Patent number: 11940222Abstract: A heat sink includes a plurality of extrusions each including a base and a fin, the plurality of extrusions being aligned in a width direction orthogonal to an extrusion direction and joined to each other. The plurality of extrusions include a first extrusion including a plurality of fins, the first extrusion including, in the base, a through-hole in which a heat pipe is mountable, the through-hole extending in the extrusion direction.Type: GrantFiled: September 12, 2017Date of Patent: March 26, 2024Assignee: Sumitomo Precision Products Co., Ltd.Inventors: Shota Hanafusa, Keiji Miki
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Publication number: 20230413452Abstract: A laminated wiring board includes a plurality of first wiring boards laminated on one another, a first insulating resin layer disposed between two adjacent first wiring boards among the plurality of first wiring boards, and a second insulating resin layer configured to cover side surfaces of the plurality of first wiring boards.Type: ApplicationFiled: June 8, 2023Publication date: December 21, 2023Inventor: Shota MIKI
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Publication number: 20230411264Abstract: A laminated wiring board includes a first wiring board, a plurality of second wiring boards disposed side by side and laminated on the first wiring board, a third wiring board laminated on the plurality of second wiring boards, a first insulating resin layer disposed between the first wiring board and the plurality of second wiring boards, and a second insulating resin layer disposed between the plurality of second wiring boards and the third wiring board.Type: ApplicationFiled: June 8, 2023Publication date: December 21, 2023Inventor: Shota MIKI
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Publication number: 20230230911Abstract: A wiring substrate has a first wiring substrate, plurality of second wiring substrates, and an adhesive layer. The plurality of second wiring substrates are arranged adjacent to each other on the first wiring substrate. The adhesive layer adheres the first wiring substrate and the plurality of second wiring substrates to each other. The adhesive layer has a filling portion that fills a groove portion formed by opposing of side surfaces of adjacent ones of the plurality of second wiring substrates.Type: ApplicationFiled: January 17, 2023Publication date: July 20, 2023Inventor: Shota Miki
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Patent number: 11706877Abstract: A composite wiring substrate includes a first wiring substrate including a first connection terminal, a second wiring substrate including a second connection terminal facing the first connection terminal, and a joint material joining the first connection terminal and the second connection terminal. The first outline of the first connection terminal is inside the second outline of the second connection terminal in a plan view. The joint material includes a first portion formed of an intermetallic alloy of copper and tin, and contacting each of the first connection terminal and the second connection terminal, and a second portion formed of an alloy of tin and bismuth, and including a portion between the first outline and the second outline in the plan view. The second portion contains the bismuth at a higher concentration than in the eutectic composition of a tin-bismuth alloy, and is separated from the second connection terminal.Type: GrantFiled: May 2, 2022Date of Patent: July 18, 2023Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.Inventors: Shota Miki, Koyuki Kawakami, Kiyoshi Oi, Kei Murayama, Mitsuhiro Aizawa
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Publication number: 20230174696Abstract: The present invention aims to provide an acrylic copolymer capable of maintaining excellent storage stability in the uncrosslinked state even after long-term exposure to high temperatures, and a crosslinked acrylic rubber product produced from the acrylic copolymer which maintains good normal-state properties and good water resistance. The present invention is based on the finding that an acrylic copolymer produced by polymerizing a liquid mixture of an alkoxyalkyl (meth)acrylate containing an alkoxyalkyl group and a crosslinkable monomer containing a carboxy group has excellent storage stability and that a crosslinked product produced from the acrylic copolymer has good normal-state properties and good water resistance.Type: ApplicationFiled: March 30, 2021Publication date: June 8, 2023Inventors: Ryo OKADA, Yoshihiro MOROOKA, Shota MIKI, Motoki KITAGAWA
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Publication number: 20220361342Abstract: A composite wiring substrate includes a first wiring substrate including a first connection terminal, a second wiring substrate including a second connection terminal facing the first connection terminal, and a joint material joining the first connection terminal and the second connection terminal. The first outline of the first connection terminal is inside the second outline of the second connection terminal in a plan view. The joint material includes a first portion formed of an intermetallic alloy of copper and tin, and contacting each of the first connection terminal and the second connection terminal, and a second portion formed of an alloy of tin and bismuth, and including a portion between the first outline and the second outline in the plan view. The second portion contains the bismuth at a higher concentration than in the eutectic composition of a tin-bismuth alloy, and is separated from the second connection terminal.Type: ApplicationFiled: May 2, 2022Publication date: November 10, 2022Inventors: Shota MIKI, Koyuki KAWAKAMI, Kiyoshi OI, Kei MURAYAMA, Mitsuhiro AIZAWA
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Publication number: 20220356283Abstract: The present invention addresses the problem of providing an emulsion having excellent emulsion stability and excellent coagulability (salting-out properties) in manufacturing of an acrylic rubber. The present invention provides an acrylic emulsion containing an acrylic polymer having an average particle diameter of 150-300 nm in a step for emulsion-polymerizing a monomer in manufacturing of an acrylic rubber.Type: ApplicationFiled: September 28, 2020Publication date: November 10, 2022Inventors: Shota Miki, Motoki Kitagawa, Masatsugu Naitou
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Patent number: 11233001Abstract: An interconnect board includes: a first substrate; a second substrate having an outer shape smaller than an outer shape of the first substrate and mounted on the first substrate; and an adhesive layer bonding the first substrate and the second substrate together and having a fillet contacting a side surface of the second substrate. The fillet has a raised portion raised from a level of a top surface of the second substrate to a level higher than the top surface of the second substrate.Type: GrantFiled: December 12, 2019Date of Patent: January 25, 2022Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.Inventors: Shota Miki, Naoki Kobayashi
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Patent number: 10959328Abstract: A wiring substrate includes: a wiring structure that includes a wiring layer and an insulating layer laminated; a plurality of first posts that are formed along a periphery of a predetermined area on a surface of the wiring structure, and that protrude out from the surface of the wiring structure; and a second post that is connected to the wiring layer at a position surrounded by the first posts, and that protrudes out from the surface of the wiring structure. The first posts are formed such that a post arranged at a central portion of a side constituting the periphery of the predetermined area is lower in height from the surface of the wiring structure than posts arranged at both ends of the side.Type: GrantFiled: June 29, 2020Date of Patent: March 23, 2021Inventors: Naoki Kobayashi, Kei Murayama, Mitsuhiro Aizawa, Shota Miki
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Publication number: 20210007220Abstract: A wiring substrate includes: a wiring structure that includes a wiring layer and an insulating layer laminated; a plurality of first posts that are formed along a periphery of a predetermined area on a surface of the wiring structure, and that protrude out from the surface of the wiring structure; and a second post that is connected to the wiring layer at a position surrounded by the first posts, and that protrudes out from the surface of the wiring structure. The first posts are formed such that a post arranged at a central portion of a side constituting the periphery of the predetermined area is lower in height from the surface of the wiring structure than posts arranged at both ends of the side.Type: ApplicationFiled: June 29, 2020Publication date: January 7, 2021Inventors: Naoki Kobayashi, Kei Murayama, Mitsuhiro Aizawa, Shota Miki
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Publication number: 20200211946Abstract: An interconnect board includes: a first substrate; a second substrate having an outer shape smaller than an outer shape of the first substrate and mounted on the first substrate; and an adhesive layer bonding the first substrate and the second substrate together and having a fillet contacting a side surface of the second substrate. The fillet has a raised portion raised from a level of a top surface of the second substrate to a level higher than the top surface of the second substrate.Type: ApplicationFiled: December 12, 2019Publication date: July 2, 2020Inventors: Shota Miki, Naoki Kobayashi
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Patent number: 10485098Abstract: An electronic component device includes: a wiring board including an insulating layer, and a plurality of pads exposed from the insulating layer; an electronic component module including: an insulating base material; an electronic component embedded in the insulating base material; and a plurality of connection terminals each connected to a corresponding one of the pads; and a sealing resin provided between the whole of a lower surface of the electronic component module id the wiring board. A content rate of filler contained in the sealing resin is higher than that of filler contained in the insulating layer and that of filler contained in the insulating base material.Type: GrantFiled: June 16, 2016Date of Patent: November 19, 2019Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.Inventor: Shota Miki
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Patent number: 10340200Abstract: A semiconductor device includes: a first semiconductor chip including an electrode pad on one surface of the first semiconductor chip; a multilayer chip stack that is disposed on the one surface of the first semiconductor chip to be connected to the electrode pad; a columnar spacer that is disposed on the one surface of the first semiconductor chip; and an underfill resin. The multilayer chip stack includes a plurality of second semiconductor chips each of which comprises a connection terminal. The connection terminal of one of the second semiconductor chips is directly connected to the electrode pad. Another one of the second semiconductor chips is mounted on the one of the second semiconductor chips. A gap between the first semiconductor chip and the one of the second semiconductor chips and a gap between adjacent ones of the second semiconductor chips are filled with the underfill resin.Type: GrantFiled: November 29, 2017Date of Patent: July 2, 2019Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.Inventor: Shota Miki
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Publication number: 20180174939Abstract: A semiconductor device includes: a first semiconductor chip including an electrode pad on one surface of the first semiconductor chip; a multilayer chip stack that is disposed on the one surface of the first semiconductor chip to be connected to the electrode pad; a columnar spacer that is disposed on the one surface of the first semiconductor chip; and an underfill resin. The multilayer chip stack includes a plurality of second semiconductor chips each of which comprises a connection terminal. The connection terminal of one of the second semiconductor chips is directly connected to the electrode pad. Another one of the second semiconductor chips is mounted on the one of the second semiconductor chips. A gap between the first semiconductor chip and the one of the second semiconductor chips and a gap between adjacent ones of the second semiconductor chips are filled with the underfill resin.Type: ApplicationFiled: November 29, 2017Publication date: June 21, 2018Inventor: Shota Miki
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Patent number: 9953958Abstract: An electronic component device includes a first electronic component, a second electronic component disposed on and connected to the first electronic component, a first underfill resin filled between the first electronic component and the second electronic component, the first underfill resin having a base part arranged around the second electronic component and a convex portion formed on an upper surface of the base part, a third electronic component disposed on and connected to the second electronic component with being in contact with the convex portion of the base part at a peripheral edge portion thereof, and a second underfill resin filled between the second electronic component and the third electronic component.Type: GrantFiled: July 11, 2016Date of Patent: April 24, 2018Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.Inventor: Shota Miki
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Patent number: 9825006Abstract: An electronic component device includes a first electronic component, a second electronic component disposed on and connected to the first electronic component, a first underfill resin filled between the first electronic component and the second electronic component, the first underfill resin having a base part arranged around the second electronic component and an alignment mark formed on an upper surface of the base part, a third electronic component disposed on and connected to the second electronic component, and a second underfill resin filled between the second electronic component and the third electronic component.Type: GrantFiled: July 11, 2016Date of Patent: November 21, 2017Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.Inventor: Shota Miki
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Patent number: 9633978Abstract: A semiconductor device includes a wiring substrate, a first semiconductor chip flip-chip connected to the wiring substrate, a first underfill resin filled between the wiring substrate and the first semiconductor chip, the first underfill resin including a pedestal portion arranged in a periphery of the first semiconductor chip, a second semiconductor chip flip-chip connected to the first semiconductor chip, and being larger in area than the first semiconductor chip, and a second underfill resin filled between the first semiconductor chip and the second semiconductor chip, the second underfill resin covering an upper face of the pedestal portion of the first underfill resin and a side face of the second semiconductor chip.Type: GrantFiled: December 11, 2014Date of Patent: April 25, 2017Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.Inventor: Shota Miki
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Publication number: 20170025386Abstract: A semiconductor device includes a first semiconductor chip and a second semiconductor chip stacked on the first semiconductor chip in a stacking direction. The first semiconductor chip includes a through electrode and a pad on an end face of the through electrode, facing toward the second semiconductor chip. The second semiconductor chip includes a connection terminal at a surface thereof facing toward the first semiconductor chip. The end face of the through electrode and a surface of the connection terminal, facing toward the first semiconductor chip, do not overlap each other when viewed in the stacking direction. The pad and the connection terminal are electrically connected by a bonding part.Type: ApplicationFiled: June 23, 2016Publication date: January 26, 2017Inventor: Shota MIKI