Abstract: A parallel driving device that drives parallel-connected semiconductor elements includes a control unit and a gate driving circuit. The control unit detects a temperature difference between the semiconductor elements on the basis of detected values by temperature sensors that detect temperatures of the individual semiconductor elements. The control unit generates a control signal for changing the timing at which to turn on a first semiconductor element specified from the semiconductor elements on the basis of the temperature difference. The gate driving circuit generates a first driving signal for driving the semiconductor elements, and generates a second driving signal that is the first driving signal delayed on the basis of the control signal, and applies the second driving signal to the first semiconductor element.

Abstract: A gate drive circuit includes a resistor, a current detector that detects a current flowing through the resistor, and a gate driver. The gate driver applies an electric signal between a gate terminal and a source terminal of a module to drive a switching semiconductor element. One end of the resistor is connected to a drain terminal, the opposite end of the resistor is connected to one end of the current detector, and the opposite end of the current detector is connected to the gate driver. The current detector outputs a detection value of the current to the gate driver, and the gate driver changes a gate drive speed of the switching semiconductor element according to the detection value.

Abstract: A semiconductor device includes: a circuit member including a planar portion; a terminal portion formed above the front surface of the planar portion of the circuit member and parallel to the planar portion; a semiconductor element which has an upper surface located below an upper surface of the terminal portion and is formed on the front surface of the planar portion of the circuit member; a resin layer arranged on the semiconductor element and having first openings through which the semiconductor element is exposed; a conductive layer arranged on the resin layer, including an upper surface located above the upper surface of the terminal portion, and joined to the semiconductor element through the first openings; and a sealing member including an upper surface parallel to the planar portion and integrally sealing the circuit member, the semiconductor element, the resin layer, the conductive layer, and part of the terminal portion.

Abstract: A semiconductor device includes: a first power supply terminal; a second power supply terminal; an output terminal; a first switching element connected between the first power supply terminal and the output terminal; and a second switching element connected between the second power supply terminal and the output terminal. The first power supply terminal includes: a first facing portion; a second facing portion; and a third facing portion. The first facing portion and the second facing portion are provided such that, upon application of a current, the current flows through the first facing portion and the second facing portion in a direction opposite to a direction in which the current flows through each of portions in the second power supply terminal that face the first facing portion and the second facing portion.

Abstract: A power semiconductor module includes a plurality of self-arc-extinguishing semiconductor elements, a printed wiring board, a plurality of conductive joining members, and a plurality of conductive gate wires. The printed wiring board includes an insulating substrate, a source conductive pattern, and a gate conductive pattern. The plurality of self-arc-extinguishing semiconductor elements each include a source electrode and a gate electrode. The source electrodes are joined to the source conductive pattern by means of the plurality of conductive joining members. The plurality of conductive gate wires connect the gate electrodes and the gate conductive pattern.

Abstract: A semiconductor device includes: a first power supply terminal; a second power supply terminal; an output terminal; a first switching element connected between the first power supply terminal and the output terminal; and a second switching element connected between the second power supply terminal and the output terminal. The first power supply terminal includes: a first facing portion; a second facing portion; and a third facing portion. The first facing portion and the second facing portion are provided such that, upon application of a current, the current flows through the first facing portion and the second facing portion in a direction opposite to a direction in which the current flows through each of portions in the second power supply terminal that face the first facing portion and the second facing portion.

Abstract: A parallel driving device that drives parallel-connected semiconductor elements includes a control unit and a gate driving circuit. The control unit detects a temperature difference between the semiconductor elements on the basis of detected values by temperature sensors that detect temperatures of the individual semiconductor elements. The control unit generates a control signal for changing the timing at which to turn on a first semiconductor element specified from the semiconductor elements on the basis of the temperature difference. The gate driving circuit generates a first driving signal for driving the semiconductor elements, and generates a second driving signal that is the first driving signal delayed on the basis of the control signal, and applies the second driving signal to the first semiconductor element.

Abstract: An emitter interconnection connecting the emitter of a semiconductor switching element to a negative electrode is different in one or both of length and width from an emitter interconnection connecting the emitter of a semiconductor switching element to the negative electrode. At the time of switching, an induced electromotive force is generated at a gate control wire, or at a gate pattern, or at an emitter wire, by at least one of a current flowing through a positive electrode and a current flowing through the negative electrode, so as to reduce the difference between the emitter potential of the semiconductor switching element and the emitter potential of the semiconductor switching element caused by the difference.

Abstract: Gates of a plurality of semiconductor switching elements are electrically connected to a common gate control pattern by gate wires. Sources of the plurality of semiconductor switching elements are electrically connected to a common source control pattern by source wires. The gate control pattern is disposed to interpose the source control pattern between the gate control pattern and each of the plurality of semiconductor switching elements that are connected in parallel and that operate in parallel. Hence, each of the gate wires becomes longer than each of the source wires, and has an inductance larger than the source wire. Accordingly, gate oscillation is reduced or suppressed in the plurality of semiconductor switching elements that are connected in parallel and that operate in parallel.

Abstract: In a short circuit protection circuit, a first gate resistor is connected between a first output node of a gate driver and a first gate terminal. A first real-time control circuit operates to decrease a potential of the first gate terminal when the first real-time control circuit detects that a short circuit current passes through a first semiconductor switching element. The operation monitoring circuit includes a differential voltage circuit configured to output a potential difference between a potential proportional to a potential difference across the first gate resistor and the potential of a first power supply. The operation monitoring circuit monitors, based on an output of the differential voltage circuit, whether the first real-time control circuit is in operation.

Abstract: In a short circuit protection circuit, a first gate resistor is connected between a first output node of a gate driver and a first gate terminal. A first real-time control circuit operates to decrease a potential of the first gate terminal when the first real-time control circuit detects that a short circuit current passes through a first semiconductor switching element. The operation monitoring circuit includes a differential voltage circuit configured to output a potential difference between a potential proportional to a potential difference across the first gate resistor and the potential of a first power supply. The operation monitoring circuit monitors, based on an output of the differential voltage circuit, whether the first real-time control circuit is in operation.

Abstract: A semiconductor device includes: a circuit member including a planar portion; a terminal portion formed above the front surface of the planar portion of the circuit member and parallel to the planar portion; a semiconductor element which has an upper surface located below an upper surface of the terminal portion and is formed on the front surface of the planar portion of the circuit member; a resin layer arranged on the semiconductor element and having first openings through which the semiconductor element is exposed; a conductive layer arranged on the resin layer, including an upper surface located above the upper surface of the terminal portion, and joined to the semiconductor element through the first openings; and a sealing member including an upper surface parallel to the planar portion and integrally sealing the circuit member, the semiconductor element, the resin layer, the conductive layer, and part of the terminal portion.

Abstract: An emitter interconnection connecting the emitter of a semiconductor switching element to a negative electrode is different in one or both of length and width from an emitter interconnection connecting the emitter of a semiconductor switching element to the negative electrode. At the time of switching, an induced electromotive force is generated at a gate control wire, or at a gate pattern, or at an emitter wire, by at least one of a current flowing through a positive electrode and a current flowing through the negative electrode, so as to reduce the difference between the emitter potential of the semiconductor switching element and the emitter potential of the semiconductor switching element caused by the difference.

Abstract: Gates of a plurality of semiconductor switching elements are electrically connected to a common gate control pattern by gate wires. Sources of the plurality of semiconductor switching elements are electrically connected to a common source control pattern by source wires. The gate control pattern is disposed to interpose the source control pattern between the gate control pattern and each of the plurality of semiconductor switching elements that are connected in parallel and that operate in parallel. Hence, each of the gate wires becomes longer than each of the source wires, and has an inductance larger than the source wire. Accordingly, gate oscillation is reduced or suppressed in the plurality of semiconductor switching elements that are connected in parallel and that operate in parallel.

Abstract: A power switching apparatus includes a plurality of semiconductor switching devices connected in parallel with each other and a plurality of balance resistor units. The plurality of balance resistor units each have one end connected to a control electrode of an associated semiconductor switching device and the other end to which a common control signal is input. Each balance resistor unit is configured to have a resistance value switched between different values depending on whether the plurality of semiconductor switching devices are turned on or turned off in accordance with the control signal.

Abstract: A power switching apparatus includes a plurality of semiconductor switching devices connected in parallel with each other and a plurality of balance resistor units. The plurality of balance resistor units each have one end connected to a control electrode of an associated semiconductor switching device and the other end to which a common control signal is input. Each balance resistor unit is configured to have a resistance value switched between different values depending on whether the plurality of semiconductor switching devices are turned on or turned off in accordance with the control signal.