Abstract: The present invention provides a structure and a method of fabricating a thermoelectric Cooler directly on the backside of a semiconductor substrate. The thermoelectric (TE) cooler (thermoelectric cooler) disperses heat from an integrated circuit (IC) that is formed on the front-side of the silicon substrate. Spaced first bonding pad holes 28 are formed in the backside of a substrate that expose bonding pads 24. Second holes 32 are formed between the spaced first bonding pad holes 28. A first insulating layer 34 is formed over the backside of the substrate, but not over the bonding pad 24. A metal layer is formed lining the first bonding pad holes 28. A polysilicon layer 46 is formed over the surface of the backside of the substrate in the second holes. The polysilicon layer is implanted thereby forming alternating adjacent N and P doped sections 46p 46n in the second holes. The adjacent N and P doped polysilicon sections 46n 46p are electrically connected to the bonding pads 24 by the metal layer 38.

Abstract: A method of creating a non-volatile memory device, featuring self-alignment of a control gate structure, to an underlying floating gate structure, has been developed. The formation of a first polysilicon floating gate shape, completely covering the semiconductor substrate, with openings only to underlying field oxide regions, prevents a deleterious trenching phenomena from occurring during a subsequent patterning, used to define an overlying, control gate structure. A photoresist shape is used as a mask to allow patterning of the control gate structure to be performed, via an anisotropic procedure, applied to a polysilicon layer, followed by the continuation of the anisotropic RIE procedure, applied to the first polysilicon floating gate shape, creating the floating gate structure.