Abstract: A display panel includes: a first display region used for disposing a sensor; a second display region surrounding the first display region; first pixel units in the first display region; second pixel units in the second display region; and an array substrate, where the array substrate includes a plurality of first data lines and a plurality of second data lines, and the plurality of first data lines pass through the first display region; where in the first display region, each of the plurality of first data lines is electrically connected to a sub-pixel of the first pixel units.

Abstract: A light-emitting structure, a backlight module, a display module, and a display device are provided. The light-emitting structure includes a circuit substrate, including a first surface and a second surface sequentially arranged along a light-exiting direction of the light-emitting structure. The circuit substrate also includes a light-transparent substrate and a wiring structure located on a side of the light-transparent substrate in a thickness direction. The light-emitting structure also includes a plurality of light-emitting elements, arranged in an array on one of the first surface or the second surface of the circuit substrate. The plurality of the light-emitting elements is electrically connected to the wiring structure. The light-emitting structure also includes a heat sink, located on a side of the first surface of the circuit substrate. The heat sink is configured for dissipating heat generated by the plurality of the light-emitting elements.

Abstract: A display panel includes: a first display region used for disposing a sensor; a second display region surrounding the first display region; first pixel units in the first display region; second pixel units in the second display region; and an array substrate, where the array substrate includes a plurality of first data lines and a plurality of second data lines, and the plurality of first data lines pass through the first display region; where in the first display region, each of the plurality of first data lines is electrically connected to a sub-pixel of the first pixel units.

Abstract: Disclosed are a display panel and a display apparatus. The display panel includes: a first display region and a second display region. The first display region includes first pixel units arranged in an array, and the second display region includes second pixel units arranged in an array. A density of the first pixel units in the first display region is lower than a density of the second pixel units in the second display region. The display panel further includes an array substrate, which includes first data lines and second data lines extending in a column direction. The first data lines pass through the first display region. Each first data line is electrically connected to a sub-pixel of the first pixel unit in the first display region.

Abstract: A light-emitting structure, a backlight module, a display module, and a display device are provided. The light-emitting structure includes a circuit substrate, including a first surface and a second surface sequentially arranged along a light-exiting direction of the light-emitting structure. The circuit substrate also includes a light-transparent substrate and a wiring structure located on a side of the light-transparent substrate in a thickness direction. The light-emitting structure also includes a plurality of light-emitting elements, arranged in an array on one of the first surface or the second surface of the circuit substrate. The plurality of the light-emitting elements is electrically connected to the wiring structure. The light-emitting structure also includes a heat sink, located on a side of the first surface of the circuit substrate. The heat sink is configured for dissipating heat generated by the plurality of the light-emitting elements.

Abstract: Provided are a display panel and a display apparatus. The display panel has a bonding region where a chip is bonded, and a fan-out region where fan-out leads is arranged. Bonding pads in the bonding region include a first pad array and a second pad array, the first pad array being at a side of the second pad array close to the display region. The first pad array includes first pads arranged in at least two rows. The first pad array includes at least one inclined section including at least three first pads that are arranged sequentially and obliquely away from the display region. Such an arrangement allows at least a portion of the fan-out leads to be displaced into the bonding region, to increase the area for arranging the fan-out leads. Therefore, the lower border of the display panel is narrowed.

Abstract: Provided are a shift register, a gate drive circuit and a display panel. The shift register includes a reset module, where a first control terminal of the reset module is electrically connected to a first reset-signal input terminal, a second control terminal of the reset module is electrically connected to a second reset-signal input terminal, an input terminal of the reset module is electrically connected to a second power-signal input terminal, a first output terminal of the reset module is electrically connected to a first node, and a second output terminal of the reset module is electrically connected to a scanning-signal output terminal. In the third phase, the potential of the first node P is at a second level, each of potentials of the first control terminal and the second control terminal of the reset module is at the second level.

Abstract: A display panel is provided. The display includes a first electrode layer and a second electrode layer. The first electrode layer includes a plurality of first electrodes, each having a shape extending in a first direction, wherein the plurality of the first electrodes are arranged in a second direction. The second electrode layer includes a plurality of second electrodes extending in the second direction and arranged in the first direction, the second direction being perpendicular to the first direction. A ratio between a first central distance between two adjacent first electrodes, and a second central distance between two adjacent second electrodes is in the range of 0.5 to 2. In the display panel and the display device according to the present disclosure, the display effect is reconciled with the touch recognizing performance, thus improving the touch performance of the panel and user experience.

Abstract: Disclosed are a display panel and a display apparatus. The display panel includes: a first display region and a second display region. The first display region includes first pixel units arranged in an array, and the second display region includes second pixel units arranged in an array. A density of the first pixel units in the first display region is lower than a density of the second pixel units in the second display region. The display panel further includes an array substrate, which includes first data lines and second data lines extending in a column direction. The first data lines pass through the first display region. Each first data line is electrically connected to a sub-pixel of the first pixel unit in the first display region.

Abstract: Provided are a display panel and a display apparatus. The display panel has a bonding region where a chip is bonded, and a fan-out region where fan-out leads is arranged. Bonding pads in the bonding region include a first pad array and a second pad array, the first pad array being at a side of the second pad array close to the display region. The first pad array includes first pads arranged in at least two rows. The first pad array includes at least one inclined section including at least three first pads that are arranged sequentially and obliquely away from the display region. Such an arrangement allows at least a portion of the fan-out leads to be displaced into the bonding region, to increase the area for arranging the fan-out leads. Therefore, the lower border of the display panel is narrowed.

Abstract: Provided are a shift register, a gate drive circuit and a display panel. The shift register includes a reset module, where a first control terminal of the reset module is electrically connected to a first reset-signal input terminal, a second control terminal of the reset module is electrically connected to a second reset-signal input terminal, an input terminal of the reset module is electrically connected to a second power-signal input terminal, a first output terminal of the reset module is electrically connected to a first node, and a second output terminal of the reset module is electrically connected to a scanning-signal output terminal. In the third phase, the potential of the first node P is at a second level, each of potentials of the first control terminal and the second control terminal of the reset module is at the second level.

Abstract: Provided are an array substrate, a display panel, and a display device. The array substrate includes a base substrate, scanning lines extending along first direction and data lines extending along second direction disposed on base substrate, pixel units arranged in an array along first direction and second direction; touch electrodes and touch traces disposed on base substrate, and a first insulating layer disposed between the touch traces and the touch electrodes in a direction perpendicular to base substrate. Each touch trace is connected to the touch electrodes via a first through hole in the first insulating layer. Two scanning lines are disposed between two adjacent pixel units in the second direction, and each scanning line controls its adjacent pixel unit. An orthographic projection of the first through hole on the base substrate is located between the two scanning lines and does not overlap with them.

Abstract: A display panel, a display device and a driving method of the display panel are provided. The display panel includes: a plurality of touch electrodes; a plurality of control units; switching units. Each switching unit and one of the control units are arranged to be associated with each other. Each switching unit is associated with one of the touch electrodes. Each control unit has a first and a second triggering signal input terminal, different gate driving signals are input to the first and the second triggering signal input terminal respectively. Each control unit is configured to output a control signal to an associated switching unit according to the gate driving signals input to the first and the second triggering signal input terminal. The associated switching unit is configured to output a touch signal to the associated one of the touch electrodes according to the control signal.

Abstract: A display panel is provided. The display includes a first electrode layer and a second electrode layer. The first electrode layer includes a plurality of first electrodes, each having a shape extending in a first direction, wherein the plurality of the first electrodes are arranged in a second direction. The second electrode layer includes a plurality of second electrodes extending in the second direction and arranged in the first direction, the second direction being perpendicular to the first direction. A ratio between a first central distance between two adjacent first electrodes, and a second central distance between two adjacent second electrodes is in the range of 0.5 to 2. In the display panel and the display device according to the present disclosure, the display effect is reconciled with the touch recognizing performance, thus improving the touch performance of the panel and user experience.

Abstract: An array substrate, a display panel, and a display device are provided. The array substrate includes a substrate, and a plurality of scanning lines and a plurality of data lines disposed on the substrate. The plurality of scanning lines and the plurality of data lines are insulated and intersected to define a plurality of pixel units. Each pixel unit includes a thin film transistor and a pixel electrode, a gate electrode of the thin film transistor is electrically connected to a scanning line, a source electrode is electrically connected to a data line, and a drain electrode is electrically connected to the pixel electrode. An active layer of the thin film transistor includes at least one channel region including first sub-channel region and at least one second sub-channel region. A first width of the first sub-channel region is smaller than a second width of the second sub-channel region.

Abstract: A shift register includes a forward/backward scan-control module, configured to transmit a signal of a forward-scan-signal terminal or a signal of a backward-scan-signal terminal to a first node; an interlock module, configured to transmit a signal of a first voltage terminal to a second node, and transmit a signal of a second voltage terminal to the first node; a pull-down module, configured to transmit the signal of the first voltage terminal to a gate-signal output terminal; an output module, configured to transmit a signal of a second clock-signal terminal to the gate-signal output terminal; and a reset module, configured to transmit the signal of the second voltage terminal to the first node, and transmit the signal of the first voltage terminal to the gate-signal output terminal. The disclosed shift register can prevent leakage of the first node, and thus improve the quality and the performance of the shift register.

Abstract: A shift register includes a forward/backward scan-control module, configured to transmit a signal of a forward-scan-signal terminal or a signal of a backward-scan-signal terminal to a first node; an interlock module, configured to transmit a signal of a first voltage terminal to a second node, and transmit a signal of a second voltage terminal to the first node; a pull-down module, configured to transmit the signal of the first voltage terminal to a gate-signal output terminal; an output module, configured to transmit a signal of a second clock-signal terminal to the gate-signal output terminal; and a reset module, configured to transmit the signal of the second voltage terminal to the first node, and transmit the signal of the first voltage terminal to the gate-signal output terminal. The disclosed shift register can prevent leakage of the first node, and thus improve the quality and the performance of the shift register.

Abstract: A display panel is provided. The display includes a first electrode layer and a second electrode layer. The first electrode layer includes a plurality of first electrodes, each having a shape extending in a first direction, wherein the plurality of the first electrodes are arranged in a second direction. The second electrode layer includes a plurality of second electrodes extending in the second direction and arranged in the first direction, the second direction being perpendicular to the first direction. A ration between a first central distance between two adjacent first electrodes, and a second central distance between two adjacent second electrodes is in the range of 0.5 to 2. In the display panel and the display device according to the present disclosure, the display effect is reconciled with the touch recognizing performance, thereby improving the touch performance of the panel and user experience.

Abstract: An array substrate, a display panel, and a display device are provided. The array substrate includes a substrate, and a plurality of scanning lines and a plurality of data lines disposed on the substrate. The plurality of scanning lines and the plurality of data lines are insulated and intersected to define a plurality of pixel units. Each pixel unit includes a thin film transistor and a pixel electrode. A gate electrode of the thin film transistor is electrically connected to a scanning line, a source electrode of the thin film transistor is electrically connected to a data line, and a drain electrode of the thin film transistor is electrically connected to the pixel electrode. An effective length of a channel region of the thin film transistor is longer than or equal to one third of a length of the pixel unit along an extension direction of the scanning line.

Abstract: A pixel structure including a pixel array is disclosed. The pixel array includes a plurality of pixels, each including a first sub-pixel, a second sub-pixel, and a third sub-pixel. The pixel array also includes a plurality of pixel dots, each including a plurality of sub-pixels from two adjacent rows of sub-pixels in the pixel array, wherein any two of the adjacent rows of sub-pixels in the pixel array are shared by each other. A first pixel dot includes a first sub-pixel and a plurality of surrounding sub-pixels adjacent to the first sub-pixel, wherein at least one or more of the surrounding sub-pixels and the first sub-pixel are shared by each other. In addition, the first pixel dot includes at least four sub-pixels including at least one first sub-pixel, one second sub-pixel, and one third sub-pixel.