Patents by Inventor Shu-Lin LAI
Shu-Lin LAI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11880607Abstract: A self-repair memory circuit includes a cell array, a controller, a row repair decoder, and a column repair decoder. The cell array includes rows and columns of memory cells. The controller receives an input indicating row repair or column repair, and a repair address shared by the row repair and the column repair of the cell array. The row repair decoder maps the repair address of a defective row to a redundant row of the cell array when the input indicates the row repair. The column repair decoder maps the repair address of a defective column to another column of the cell array when the input indicates the column repair.Type: GrantFiled: November 17, 2021Date of Patent: January 23, 2024Assignee: MEDIATEK SINGAPORE PTE. LTD.Inventors: Kim Soon Jway, Shu-Lin Lai, Yi-Ping Kuo
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Publication number: 20220171543Abstract: A self-repair memory circuit includes a cell array, a controller, a row repair decoder, and a column repair decoder. The cell array includes rows and columns of memory cells. The controller receives an input indicating row repair or column repair, and a repair address shared by the row repair and the column repair of the cell array. The row repair decoder maps the repair address of a defective row to a redundant row of the cell array when the input indicates the row repair. The column repair decoder maps the repair address of a defective column to another column of the cell array when the input indicates the column repair.Type: ApplicationFiled: November 17, 2021Publication date: June 2, 2022Inventors: Kim Soon Jway, Shu-Lin Lai, Yi-Ping Kuo
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Patent number: 10770161Abstract: A sense amplifier for reading a via Read-Only Memory (Via-ROM) is provided. The sense amplifier includes a read circuit, an adaptive keeper circuit and a leakage monitor circuit. The read circuit is connected to the via-ROM. The adaptive keeper circuit is connected to the read circuit. The leakage monitor circuit is connected to the adaptive keeper circuit for forming a current mirror, such that the adaptive keeper circuit compensates a read voltage of a memory cell whose via is opened when a bit-line leakage is happened.Type: GrantFiled: December 6, 2018Date of Patent: September 8, 2020Assignee: MEDIATEK INC.Inventors: Chia-Wei Wang, Shu-Lin Lai, Yi-Te Chiu
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Publication number: 20190108890Abstract: A sense amplifier for reading a via Read-Only Memory (Via-ROM) is provided. The sense amplifier includes a read circuit, an adaptive keeper circuit and a leakage monitor circuit. The read circuit is connected to the via-ROM. The adaptive keeper circuit is connected to the read circuit. The leakage monitor circuit is connected to the adaptive keeper circuit for forming a current mirror, such that the adaptive keeper circuit compensates a read voltage of a memory cell whose via is opened when a bit-line leakage is happened.Type: ApplicationFiled: December 6, 2018Publication date: April 11, 2019Inventors: Chia-Wei Wang, Shu-Lin Lai, Yi-Te Chiu
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Patent number: 10181358Abstract: A sense amplifier for reading a via Read-Only Memory (Via-ROM) is provided. The sense amplifier includes a read circuit, an adaptive keeper circuit and a leakage monitor circuit. The read circuit is connected to the via-ROM. The adaptive keeper circuit is connected to the read circuit. The leakage monitor circuit is connected to the adaptive keeper circuit for forming a current mirror, such that the adaptive keeper circuit compensates a read voltage of a memory cell whose via is opened when a bit-line leakage is happened.Type: GrantFiled: April 20, 2017Date of Patent: January 15, 2019Assignee: MEDIATEK INC.Inventors: Chia-Wei Wang, Shu-Lin Lai, Yi-Te Chiu
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Patent number: 10176853Abstract: A pre-processing circuit is used for pre-processing a data-line voltage representative of a data output of a memory device. The pre-processing circuit includes a pre-charging circuit and a clamping circuit. The pre-charging circuit pre-charges a data line to adjust the data-line voltage at the data line that is coupled to the memory device. The clamping circuit clamps the data-line voltage to generate a clamped data-line voltage when the data-line voltage is pre-charged to a level that enables a clamping function of the clamping circuit, wherein the clamped data-line voltage is lower than a supply voltage of the pre-processing circuit. The clamping circuit includes a feedback circuit that feeds back a control voltage according to the data-line voltage at the data line, and further reduces its direct current (DC) leakage when the data-line voltage is clamped, wherein the clamping function of the clamping circuit is controlled by the control voltage.Type: GrantFiled: April 27, 2017Date of Patent: January 8, 2019Assignee: MEDIATEK INC.Inventors: Chi-Hao Hong, Dao-Ping Wang, Yi-Wei Chen, Yi-Ping Kuo, Shu-Lin Lai
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Patent number: 10043578Abstract: A sense amplifier circuit includes a single-ended sense amplifier and an isolation switch. The isolation switch is coupled between a bias node and a first line of a memory device, receives an output of the single-ended sense amplifier and selectively isolates the bias node and the first line in response to the output of the single-ended sense amplifier. The first line is coupled to a plurality of memory cells of the memory device.Type: GrantFiled: November 8, 2016Date of Patent: August 7, 2018Assignee: MEDIATEK INC.Inventors: Shu-Lin Lai, Shu-Hsuan Lin, Shih-Huang Huang
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Publication number: 20180114583Abstract: A sense amplifier for reading a via Read-Only Memory (Via-ROM) is provided. The sense amplifier includes a read circuit, an adaptive keeper circuit and a leakage monitor circuit. The read circuit is connected to the via-ROM. The adaptive keeper circuit is connected to the read circuit. The leakage monitor circuit is connected to the adaptive keeper circuit for forming a current mirror, such that the adaptive keeper circuit compensates a read voltage of a memory cell whose via is opened when a bit-line leakage is happened.Type: ApplicationFiled: April 20, 2017Publication date: April 26, 2018Inventors: Chia-Wei Wang, Shu-Lin Lai, Yi-Te Chiu
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Publication number: 20170345469Abstract: A pre-processing circuit is used for pre-processing a data-line voltage representative of a data output of a memory device. The pre-processing circuit includes a pre-charging circuit and a clamping circuit. The pre-charging circuit pre-charges a data line to adjust the data-line voltage at the data line that is coupled to the memory device. The clamping circuit clamps the data-line voltage to generate a clamped data-line voltage when the data-line voltage is pre-charged to a level that enables a clamping function of the clamping circuit, wherein the clamped data-line voltage is lower than a supply voltage of the pre-processing circuit. The clamping circuit includes a feedback circuit that feeds back a control voltage according to the data-line voltage at the data line, and further reduces its direct current (DC) leakage when the data-line voltage is clamped, wherein the clamping function of the clamping circuit is controlled by the control voltage.Type: ApplicationFiled: April 27, 2017Publication date: November 30, 2017Inventors: Chi-Hao Hong, Dao-Ping Wang, Yi-Wei Chen, Yi-Ping Kuo, Shu-Lin Lai
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Publication number: 20170140822Abstract: A sense amplifier circuit includes a single-ended sense amplifier and an isolation switch. The isolation switch is coupled between a bias node and a first line of a memory device, receives an output of the single-ended sense amplifier and selectively isolates the bias node and the first line in response to the output of the single-ended sense amplifier. The first line is coupled to a plurality of memory cells of the memory device.Type: ApplicationFiled: November 8, 2016Publication date: May 18, 2017Inventors: Shu-Lin LAI, Shu-Hsuan LIN, Shih-Huang HUANG
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Patent number: 8773894Abstract: A static random access memory includes a pre-charger, a first cell column array/peripheral circuit, and a first ripple buffer. The pre-charger is connected to a first local bit line in order to pre-charge the first local bit line. The first cell column array/peripheral circuit is connected to the first local bit line and has a plurality of cells for temporarily storing data. The cells are connected to the first local bit line. The first ripple buffer is connected to the first local bit line and a second local bit line in order to send the data from the first local bit line to the second local bit line.Type: GrantFiled: November 26, 2012Date of Patent: July 8, 2014Assignee: National Chiao Tung UniversityInventors: Ching-Te Chuang, Hao-I Yang, Chien-Yu Lu, Chien-Hen Chen, Chi-Shin Chang, Po-Tsang Huang, Shu-Lin Lai, Wei Hwang, Shyh-Jye Jou, Ming-Hsien Tu
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Publication number: 20140078818Abstract: A static random access memory includes a pre-charger, a first cell column array/peripheral circuit, and a first ripple buffer. The pre-charger is connected to a first local bit line in order to pre-charge the first local bit line. The first cell column array/peripheral circuit is connected to the first local bit line and has a plurality of cells for temporarily storing data. The cells are connected to the first local bit line. The first ripple buffer is connected to the first local bit line and a second local bit line in order to send the data from the first local bit line to the second local bit line.Type: ApplicationFiled: November 26, 2012Publication date: March 20, 2014Applicant: NATIONAL CHIAO TUNG UNIVERSITYInventors: Ching-Te CHUANG, Hao-I YANG, Chien-Yu LU, Chien-Hen CHEN, Chi-Shin CHANG, Po-Tsang HUANG, Shu-Lin LAI, Wei HWANG, Shyh-Jye JOU, Ming-Hsien TU