Patents by Inventor Shuenrun Seara JIAN

Shuenrun Seara JIAN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11894043
    Abstract: A power management circuit in a low-power double data rate memory is configured to manage a plurality of power supplies memory according to a reference voltage. A low dropout regulator has a first transmitting terminal and a second transmitting terminal. The low dropout regulator adjusts a voltage difference between a first voltage and a second voltage according to the reference voltage. A power network structure is electrically connected to the low dropout regulator. A first power network circuit has a first connecting point, a grid shape and a first unit network space. A second power network circuit has a second connecting point, another grid shape and a second unit network space. The second connecting point is separated from the first connecting point by a distance. The distance is smaller than or equal to one of the first unit network space and the second unit network space.
    Type: Grant
    Filed: March 25, 2022
    Date of Patent: February 6, 2024
    Assignee: INTEGRATED SILICON SOLUTION INC.
    Inventor: Shuenrun Seara Jian
  • Patent number: 11841722
    Abstract: A controlling circuit for a low-power low dropout regulator includes the low-power low dropout regulator, a current load detector and a bias current circuit. The low-power low dropout regulator has a first transmitting terminal and a second transmitting terminal. The first transmitting terminal is configured to transmit a first voltage, the second transmitting terminal is configured to transmit a second voltage, and the low-power low dropout regulator adjusts a voltage difference between the first voltage and the second voltage. The current load detector detects the first voltage and the second voltage, and compares the reference voltage with the second voltage to generate a detected signal. The bias current circuit generates a bias voltage and a reference current, and the low-power low dropout regulator dynamically adjust a bias current of the low-power low dropout regulator, so that the bias current is positively correlated with the reference current.
    Type: Grant
    Filed: May 4, 2022
    Date of Patent: December 12, 2023
    Assignee: INTEGRATED SILICON SOLUTION INC.
    Inventor: Shuenrun Seara Jian
  • Publication number: 20230176600
    Abstract: A controlling circuit for a low-power low dropout regulator includes the low-power low dropout regulator, a current load detector and a bias current circuit. The low-power low dropout regulator has a first transmitting terminal and a second transmitting terminal. The first transmitting terminal is configured to transmit a first voltage, the second transmitting terminal is configured to transmit a second voltage, and the low-power low dropout regulator adjusts a voltage difference between the first voltage and the second voltage. The current load detector detects the first voltage and the second voltage, and compares the reference voltage with the second voltage to generate a detected signal. The bias current circuit generates a bias voltage and a reference current, and the low-power low dropout regulator dynamically adjust a bias current of the low-power low dropout regulator, so that the bias current is positively correlated with the reference current.
    Type: Application
    Filed: May 4, 2022
    Publication date: June 8, 2023
    Inventor: Shuenrun Seara JIAN
  • Publication number: 20230140988
    Abstract: A power management circuit in a low-power double data rate memory is configured to manage a plurality of power supplies memory according to a reference voltage. A low dropout regulator has a first transmitting terminal and a second transmitting terminal. The low dropout regulator adjusts a voltage difference between a first voltage and a second voltage according to the reference voltage. A power network structure is electrically connected to the low dropout regulator. A first power network circuit has a first connecting point, a grid shape and a first unit network space. A second power network circuit has a second connecting point, another grid shape and a second unit network space. The second connecting point is separated from the first connecting point by a distance. The distance is smaller than or equal to one of the first unit network space and the second unit network space.
    Type: Application
    Filed: March 25, 2022
    Publication date: May 11, 2023
    Inventor: Shuenrun Seara JIAN
  • Publication number: 20230147226
    Abstract: A size setting method for a power switch transistor and a system thereof are proposed. A load current extracting step is performed to extract a first load current and a second load current. A limited voltage drop calculating step is performed to calculate a limited voltage drop according to a speed proportional value, the first load current and the second load current. A standard supply current calculating step is performed to calculate a standard supply current according to the limited voltage drop. A simulated supply current calculating step is performed to calculate a simulated supply current according to the standard supply current, the limited voltage drop and a line voltage value. A size setting step is performed to compare the first load current with the simulated supply current to calculate a size parameter, and set a size of the power switch transistor according to the size parameter.
    Type: Application
    Filed: February 22, 2022
    Publication date: May 11, 2023
    Inventor: Shuenrun Seara JIAN