Patents by Inventor Shuhei MIWA

Shuhei MIWA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11722102
    Abstract: A protection circuit comprises a first transistor, a comparator, a second transistor, and a third transistor. The first transistor has a gate connected to an input terminal and configured to pass a drain current based on a potential at the input terminal. The comparator has a non-inverting terminal to which a source of the first transistor is connected and an inverting terminal to which a reference voltage is applied. The second transistor has a gate to which an output of the comparator is applied, a source connected to a power supply voltage, and a drain connected to the input terminal. The third transistor has a gate to which a predetermined voltage is applied, a drain connected to the gate of the second transistor, and a source connected to the drain of the input transistor.
    Type: Grant
    Filed: August 31, 2021
    Date of Patent: August 8, 2023
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tetsuro Itakura, Shuhei Miwa
  • Publication number: 20220085769
    Abstract: A protection circuit comprises a first transistor, a comparator, a second transistor, and a third transistor. The first transistor has a gate connected to an input terminal and configured to pass a drain current based on a potential at the input terminal. The comparator has a non-inverting terminal to which a source of the first transistor is connected and an inverting terminal to which a reference voltage is applied. The second transistor has a gate to which an output of the comparator is applied, a source connected to a power supply voltage, and a drain connected to the input terminal. The third transistor has a gate to which a predetermined voltage is applied, a drain connected to the gate of the second transistor, and a source connected to the drain of the input transistor.
    Type: Application
    Filed: August 31, 2021
    Publication date: March 17, 2022
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Tetsuro ITAKURA, Shuhei MIWA