Patents by Inventor Shuhichi Okabe
Shuhichi Okabe has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8633392Abstract: A circuit board including: an insulator having a trench; a first circuit pattern formed to bury a portion of the trench; and a second circuit pattern formed on a surface of the insulator having the trench formed therein.Type: GrantFiled: January 20, 2012Date of Patent: January 21, 2014Assignee: Samsung Electro-Mechanics Co., Ltd.Inventors: Shuhichi Okabe, Myung-Sam Kang, Jung-Hyun Park, Hoe-Ku Jung, Jeong-Woo Park, Ji-Eun Kim
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Publication number: 20120111607Abstract: A circuit board including: an insulator having a trench; a first circuit pattern formed to bury a portion of the trench; and a second circuit pattern formed on a surface of the insulator having the trench formed therein.Type: ApplicationFiled: January 20, 2012Publication date: May 10, 2012Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventors: Shuhichi OKABE, Myung-Sam Kang, Jung-Hyun Park, Hoe-Ku Jung, Jeong-Woo Park, Ji-Eun Kim
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Patent number: 8124880Abstract: A method of manufacturing a circuit board that includes: forming a conductive relievo pattern, including a first plating layer, a first metal layer, and a second plating layer stacked sequentially in correspondence with a first circuit pattern, on a seed layer stacked on a carrier; stacking and pressing together the carrier and an insulator, such that a surface of the carrier having the conductive relievo pattern faces the insulator; transcribing the conductive relievo pattern into the insulator by removing the carrier; forming a conduction pattern, including a third plating layer and a second metal layer stacked sequentially in correspondence with a second circuit pattern, on the surface of the insulator having the conductive relievo pattern transcribed; removing the first plating layer and seed layer; and removing the first and second metal layers, can provide a circuit board that has high-density circuit patterns without an increased amount of insulator.Type: GrantFiled: October 22, 2007Date of Patent: February 28, 2012Assignee: Samsung Electro-Mechanics Co., Ltd.Inventors: Shuhichi Okabe, Myung-Sam Kang, Jung-Hyun Park, Hoe-Ku Jung, Jeong-Woo Park, Ji-Eun Kim
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Patent number: 7971352Abstract: A method of manufacturing a printed circuit board having solder balls. The method may include: stacking a second carrier, in which at least one hole is formed, over one side of a first carrier; forming at least one solder bump by filling the hole with a conductive material; forming a circuit pattern layer, which is electrically connected with the solder bump, on the second carrier; and exposing the solder bump by removing the first carrier and the second carrier. Using this method, uniform hemispherical solder balls with fine pitch can be formed as a part of the manufacturing process, without having to attach the solder balls separately. Carriers may be used to serve as supports during the manufacturing process, whereby deformations can be prevented in the board.Type: GrantFiled: June 19, 2008Date of Patent: July 5, 2011Assignee: Samsung Electro-Mechanics Co., Ltd.Inventors: Shuhichi Okabe, Jin-Yong An, Seok-Kyu Lee, Soon-Oh Jung, Jong-Kuk Hong, Hae-Nam Seo
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Patent number: 7824838Abstract: A method of manufacturing a printed circuit board is disclosed. The method includes: forming a relievo pattern and an intaglio pattern on a surface of a base plate; forming a metal plate, which has a metal pattern that corresponds with a shape of the relievo pattern and the intaglio pattern, by plating a surface of the relievo pattern and a surface of the intaglio pattern; separating the metal plate from the base plate; pressing the metal plate onto an insulation layer with the metal pattern facing the insulation layer; and removing a portion of the metal plate such that the metal pattern is exposed. Since this method does not use carriers, there is no need for a chemical etching process for carrier removal.Type: GrantFiled: February 1, 2008Date of Patent: November 2, 2010Assignee: Samsung Electro-Mechanics Co., Ltd.Inventors: Ji-Hong Jo, Shuhichi Okabe
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Patent number: 7707715Abstract: Disclosed is a method of fabricating a multilayer printed circuit board, which enables the formation of a micro circuit able to be realized through a semi-additive process using the CTE and rigidity of a metal carrier on a thin substrate which is difficult to convey.Type: GrantFiled: December 28, 2007Date of Patent: May 4, 2010Assignee: Samsung Electro-Mechanics, Co., Ltd.Inventors: Shuhichi Okabe, Je Gwang Yoo, Chang Sup Ryu, Myung Sam Kang, Jung Hyun Park, Ji Hong Jo, Jin Yong An, Soon Oh Jung
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Publication number: 20100024212Abstract: A method of fabricating a multilayer printed circuit board, which enables the formation of a micro circuit able to be realized through a semi-additive process using the CTE and rigidity of a metal carrier on a thin substrate which is difficult to convey.Type: ApplicationFiled: October 8, 2009Publication date: February 4, 2010Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTDInventors: Shuhichi Okabe, Je Gwang Yoo, Chang Sup Ryu, Myung Sam Kang, Jung Hyun Park, Ji Hong Jo, Jin Yong An, Soon Oh Jung
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Publication number: 20090283302Abstract: Disclosed are a printed circuit board and a manufacturing method thereof. The printed circuit board in accordance with the present invention includes: a circuit laminate, a solder resist laminated on the circuit laminate, a metal support layer formed on the solder resist, a stiffener formed on the metal support layer.Type: ApplicationFiled: January 7, 2009Publication date: November 19, 2009Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventors: Seok-Kyu Lee, Shuhichi Okabe, Seung-Hyun Cho, Jae-Joon Lee
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Publication number: 20090242238Abstract: A buried pattern substrate includes an insulation layer; a circuit pattern buried in the insulation layer such that a part thereof is exposed at a surface of the insulation layer; and a stud bump buried in the insulation layer such that one end portion is exposed at one surface of the insulation layer, and such that the other end portion is exposed at the other surface of the insulation layer.Type: ApplicationFiled: June 2, 2009Publication date: October 1, 2009Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventors: Shuhichi Okabe, Myung-Sam Kang, Jung-Hyun Park, Hoe-Ku Jung, Ji-Eun Kim
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Publication number: 20090151160Abstract: A method of manufacturing a printed circuit board having solder balls. The method may include: stacking a second carrier, in which at least one hole is formed, over one side of a first carrier; forming at least one solder bump by filling the hole with a conductive material; forming a circuit pattern layer, which is electrically connected with the solder bump, on the second carrier; and exposing the solder bump by removing the first carrier and the second carrier. Using this method, uniform hemispherical solder balls with fine pitch can be formed as a part of the manufacturing process, without having to attach the solder balls separately. Carriers may be used to serve as supports during the manufacturing process, whereby deformations can be prevented in the board.Type: ApplicationFiled: June 19, 2008Publication date: June 18, 2009Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventors: Shuhichi Okabe, Jin-Yong An, Seok-Kyu Lee, Soon-Oh Jung, Jong-Kuk Hong, Hae-Nam Seo
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Patent number: 7516545Abstract: Disclosed is a method of manufacturing a printed circuit board having a landless via hole. Specifically, this invention provides a method of manufacturing a printed circuit board having a landless via hole without the upper land of a via hole using a photoresist (P-LPR) which is loaded in the via hole. Therefore, in this invention, since a circuit pattern is formed using only copper of a copper clad laminate, the width thereof is minimized, thus easily realizing a fine circuit pattern. Further, the landless via hole structure is applied, resulting in a highly dense circuit pattern.Type: GrantFiled: November 2, 2006Date of Patent: April 14, 2009Assignee: Samsung Electro-Mechanics Co., Ltd.Inventors: Myung Sam Kang, Shuhichi Okabe, Jung Hyun Park, Hoe Ku Jung, Ji Eun Kim
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Publication number: 20090056119Abstract: Disclosed is a method of fabricating a multilayer printed circuit board, which enables the formation of a micro circuit able to be realized through a semi-additive process using the CTE and rigidity of a metal carrier on a thin substrate which is difficult to convey.Type: ApplicationFiled: December 28, 2007Publication date: March 5, 2009Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventors: Shuhichi Okabe, Je Gwang Yoo, Chang Sup Ryu, Myung Sam Kang, Jung Hyun Park, Ji Hong Jo, Jin Yong An, Soon Oh Jung
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Publication number: 20090038837Abstract: A multilayered printed circuit board is disclosed. A method of manufacturing the multilayered printed circuit board, which includes: forming a metal layer and a lower-circuit-forming pattern in order on a carrier, and forming a lower circuit by filling a conductive material in the lower-circuit-forming pattern; removing the lower-circuit-forming pattern, stacking an insulation resin, and forming at least one via hole connecting with the lower circuit; forming at least one inner circuit and at least one interlayer connector connecting the inner circuit with the lower circuit on the insulation resin, to form a pair of circuit parts; and aligning the pair of circuit parts, attaching the pair of circuit parts to each other, and removing the carrier and the metal layer, allows the forming of fine-lined circuits and provides a thin board, while preventing bending and warpage in the board.Type: ApplicationFiled: March 27, 2008Publication date: February 12, 2009Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventors: Shuhichi Okabe, Jin-Yong An, Seok-Kyu Lee, Soon-Oh Jung, Jong-Kuk Hong, Hae-Nam Seo
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Publication number: 20080264676Abstract: A method of manufacturing a circuit board that includes: forming a conductive relievo pattern, including a first plating layer, a first metal layer, and a second plating layer stacked sequentially in correspondence with a first circuit pattern, on a seed layer stacked on a carrier; stacking and pressing together the carrier and an insulator, such that a surface of the carrier having the conductive relievo pattern faces the insulator; transcribing the conductive relievo pattern into the insulator by removing the carrier; forming a conduction pattern, including a third plating layer and a second metal layer stacked sequentially in correspondence with a second circuit pattern, on the surface of the insulator having the conductive relievo pattern transcribed; removing the first plating layer and seed layer; and removing the first and second metal layers, can provide a circuit board that has high-density circuit patterns without an increased amount of insulator.Type: ApplicationFiled: October 22, 2007Publication date: October 30, 2008Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventors: Shuhichi Okabe, Myung-Sam Kang, Jung-Hyun Park, Hoe-Ku Jung, Jeong-Woo Park, Ji-Eun Kim
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Publication number: 20080261158Abstract: A method of manufacturing a printed circuit board is disclosed. The method includes: forming a relievo pattern and an intaglio pattern on a surface of a base plate; forming a metal plate, which has a metal pattern that corresponds with a shape of the relievo pattern and the intaglio pattern, by plating a surface of the relievo pattern and a surface of the intaglio pattern; separating the metal plate from the base plate; pressing the metal plate onto an insulation layer with the metal pattern facing the insulation layer; and removing a portion of the metal plate such that the metal pattern is exposed. Since this method does not use carriers, there is no need for a chemical etching process for carrier removal.Type: ApplicationFiled: February 1, 2008Publication date: October 23, 2008Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventors: Ji-Hong Jo, Shuhichi Okabe
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Publication number: 20080009128Abstract: A buried pattern substrate and a manufacturing method thereof are disclosed. A method of manufacturing a buried pattern substrate having a circuit pattern formed on a surface, in which the circuit pattern is connected electrically by a stud bump, includes (a) forming the circuit pattern and the stud bump by depositing a plating layer selectively on a seed layer of a carrier film, where the seed layer is laminated on a surface of the carrier film, (b) laminating and pressing the carrier film on an insulation layer such that the circuit pattern and the stud bump face the insulation layer, and (c) removing the carrier film and the seed layer, allows the circuit interconnection to be realized using a copper (Cu) stud bump, so that a drilling process for interconnection is unnecessary, the degree of freedom for circuit design is improved, a via land is made unnecessary and the size of a via is small, to allow higher density in a circuit.Type: ApplicationFiled: February 21, 2007Publication date: January 10, 2008Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventors: Shuhichi Okabe, Myung-Sam Kang, Jung-Hyun Park, Hoe-Ku Jung, Ji-Eun Kim
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Publication number: 20070130761Abstract: Disclosed is a method of manufacturing a printed circuit board having a landless via hole. Specifically, this invention provides a method of manufacturing a printed circuit board having a landless via hole without the upper land of a via hole using a photoresist (P-LPR) which is loaded in the via hole. Therefore, in this invention, since a circuit pattern is formed using only copper of a copper clad laminate, the width thereof is minimized, thus easily realizing a fine circuit pattern. Further, the landless via hole structure is applied, resulting in a highly dense circuit pattern.Type: ApplicationFiled: November 2, 2006Publication date: June 14, 2007Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventors: Myung Kang, Shuhichi Okabe, Jung Park, Hoe Jung, Ji Kim
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Patent number: 6184479Abstract: The multilayer printed circuit board includes a substrate, a first conductive circuit layer, a photosensitive dielectric layer and a second conductive circuit layer which is electrically connected to the first conductive circuit layer through photo-via holes formed in the photosensitive dielectric layer. The second conductive circuit layer includes a wiring area where a plurality of wires are arranged and a pad area to which an external wire is to be connected using thermocompression bonding. Significantly, to avoid depressing the photosensitive dielectric layer underneath the pad area during the thermocompression bonding, the thickness of the second conductive circuit layer at least in the pad area, is made greater than that in the wiring area by extending this thickness into the photosensitive dielectric layer.Type: GrantFiled: December 5, 1996Date of Patent: February 6, 2001Assignee: International Business Machines CorporationInventors: Shuhichi Okabe, Keizo Sakurai
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Patent number: 6105243Abstract: A method for fabricating a multilayer printed circuit board, as well as the resulting multilayer printed circuit board, is disclosed. The multilayer printed circuit board includes a substrate, a first conductive circuit layer, a photosensitive dielectric layer and a second conductive circuit layer which is electrically connected to the first conductive circuit layer through photo-via holes formed in the photosensitive dielectric layer. The second conductive circuit layer includes a wiring area where a plurality of wires are arranged and a pad area to which an external wire is to be connected using thermocompression bonding. Significantly, to avoid depressing the photosensitive dielectric layer underneath the pad area during the thermocompression bonding, the thickness of the second conductive circuit layer at least in the pad area, is made greater than that in the wiring area by extending this thickness into the photosensitive dielectric layer.Type: GrantFiled: March 11, 1999Date of Patent: August 22, 2000Assignee: International Business Machines, Corp.Inventors: Shuhichi Okabe, Keizo Sakurai
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Patent number: 5766825Abstract: A method of forming a surface laminated circuit printed circuit board (SLC) where a photosensitive thermosetting resin in solution is applied atop a circuitized substrate. The method starts with the step of concentrating and solidifying the photosensitive thermosetting resin to build up a hardness therein high enough to withstand abrasion. This is done by first dissolving the photosensitive thermosetting resin in a solvent and then applying the solution to a substantially uneven surface. This is followed by evaporating solvent at a temperature below the curing temperature of the photosensitive thermosetting resin. Next, the surface of said resin layer is abraded to form a substantially even surface, and the resin layer is cured by heating the resin high enough to cross link and polymerize the resin.Type: GrantFiled: October 11, 1995Date of Patent: June 16, 1998Assignee: International Business Machines Corp.Inventors: Masaharu Shirai, Shuhichi Okabe, Yoshiteru Kohno