Patents by Inventor Shuichi Abe

Shuichi Abe has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4812974
    Abstract: List operation on a vector in which the number of an element of a vector operand is represented by an element of another vector operand is to be performed with a general-purpose computer system having no vector registers. List vector elements are read out from a memory by adding at addresses determined sequentially by adding by adding values of a request vector increment register to a list vector address. A value resulting from the bit shift of the element is stored in a second operand increment register. A second vector element is read out from the memory at the address corresponding to a value resulting from addition of the content of the second operand increment register to the second operand initial address register, the element being then stored at the memory location of the address given by a value resulting from the addition of the value of the first operand vector increment register to the first operand address.
    Type: Grant
    Filed: January 29, 1986
    Date of Patent: March 14, 1989
    Assignee: Hitachi, Ltd.
    Inventors: Hideo Wada, Shuichi Abe, Tsuyoshi Watanabe
  • Patent number: 4733344
    Abstract: The data processing apparatus has first and second storages each independently accessible. An instruction unit applies a fetch request on a one-operand instruction to the first storage, and a fetch request on a two-operand instruction to the first and second storages. In case of a fetch request on a two-operand instruction, a storage control unit instructs the instruction unit to produce again a fetch request if one of the first and second storages is busy, and execute reading the operands in the order of decoding of instructions.
    Type: Grant
    Filed: December 24, 1985
    Date of Patent: March 22, 1988
    Assignee: Hitachi, Ltd.
    Inventors: Masaya Watanabe, Shuichi Abe
  • Patent number: 4638429
    Abstract: In the data processing apparatus utilizing the pipeline control, an OSC detect circuit detects that the execution result of a store-type instruction whose store operation has not been completed is utilized as an operand of a fetch-type instruction which succeeds the store-type instruction. When the OSC detect circuit detects an OSC and a store operation of a preceding store-type instruction is executed, the data processing apparatus aligns the operand position with the operand fetched by the fetch-type instruction and merges the store operand.
    Type: Grant
    Filed: December 18, 1984
    Date of Patent: January 20, 1987
    Assignee: Hitachi, Ltd.
    Inventors: Masaya Watabe, Shuichi Abe
  • Patent number: 4580184
    Abstract: A tape cassette comprises a cassette case for accommodating a tape therein, an angularly rotatable lid provided at a front of the cassette case, where the lid is free to open and close, and a mechanism for maintaining the lid in an open state and a closed state, respectively. The mechanism comprises a slide rod making contact with an outer peripheral surface of the lid in the vicinity of a rotary fulcrum of the lid, a leaf spring for urging the slide rod towards the outer peripheral surface of the lid so as to make contact with the outer peripheral surface, a first groove provided in a side of the cassette case, into which the slide rod is slidably fitted, a second groove provided in a side of the cassette case for accommodating the spring member, into which a rear part of the slide rod can enter to permit sliding of the slide rod, and a rib portion integrally formed with the cassette case.
    Type: Grant
    Filed: February 28, 1983
    Date of Patent: April 1, 1986
    Assignee: Victor Company of Japan, Ltd.
    Inventor: Shuichi Abe