Patents by Inventor Shuichi Hashidate
Shuichi Hashidate has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 8957708Abstract: An output buffer has a first transistor and a voltage mitigation second transistor. The first transistor is configured to generate a voltage value corresponding to the power-supply voltage in response to an input signal. The second transistor is provided between an output line and the first transistor. A gate terminal of the second transistor is applied with a power-supply bias voltage which turns the second transistor on and makes a voltage between gate and source terminals of the second transistor constant in accordance with a power-supply voltage.Type: GrantFiled: July 19, 2013Date of Patent: February 17, 2015Assignee: LAPIS Semiconductor Co., Ltd.Inventors: Masahiro Miyazaki, Shuichi Hashidate
-
Patent number: 8745420Abstract: A semiconductor device includes first, second and third power supply terminals respectively supplied with first, second and third power supply voltages. The semiconductor device also includes a first terminal connectable to a host device and a second terminal connectable to a peripheral device. The semiconductor device also includes a first circuit block connected to the first terminal and the first power supply terminal and receiving data output from the host device based on the first power supply voltage, a second circuit block connected to the second terminal and the third power supply terminal and receiving data output from the peripheral device based on the third power supply voltage, and a third circuit block connected to the second power supply terminal and controlling operation of the first circuit block and the second circuit block based on the second power supply voltage.Type: GrantFiled: March 6, 2013Date of Patent: June 3, 2014Assignee: Lapis Semiconductor Co., Ltd.Inventors: Mitsuya Ohie, Kyotaro Nakamura, Shuichi Hashidate
-
Publication number: 20140028386Abstract: An output buffer has a first transistor and a voltage mitigation second transistor. The first transistor is configured to generate a voltage value corresponding to the power-supply voltage in response to an input signal. The second transistor is provided between an output line and the first transistor. A gate terminal of the second transistor is applied with a power-supply bias voltage which turns the second transistor on and makes a voltage between gate and source terminals of the second transistor constant in accordance with a power-supply voltage.Type: ApplicationFiled: July 19, 2013Publication date: January 30, 2014Applicant: LAPIS SEMICONDUCTOR CO., LTD.Inventors: Masahiro MIYAZAKI, Shuichi HASHIDATE
-
Patent number: 8407491Abstract: A semiconductor device includes first, second and third power supply terminals respectively supplied with first, second and third power supply voltages. The semiconductor device also includes a first terminal connectable to a host device and a second terminal connectable to a peripheral device. The semiconductor device also includes a first circuit block connected to the first terminal and the first power supply terminal and receiving data output from the host device based on the first power supply voltage, a second circuit block connected to the second terminal and the third power supply terminal and receiving data output from the peripheral device based on the third power supply voltage, and a third circuit block connected to the second power supply terminal and controlling operation of the first circuit block and the second circuit block based on the second power supply voltage.Type: GrantFiled: December 30, 2009Date of Patent: March 26, 2013Assignee: Oki Semiconductor Co., Ltd.Inventors: Mitsuya Ohie, Kyotaro Nakamura, Shuichi Hashidate
-
Patent number: 7761727Abstract: A micro-controller includes a USB control unit, an MC unit having an operation mode and a stop mode and an oscillating circuit, which is commonly used by the USB control unit and the MC unit. The USB control unit includes a watching circuit for watching a condition of a first data and a second data, which is complement data of the first data. The operation of the oscillating circuit is controlled in response to an operation control signal, which is generated by a watching result, and an oscillation control signal whose voltage level is changed in response to the mode of the MC unit.Type: GrantFiled: June 24, 2008Date of Patent: July 20, 2010Assignee: Oki Semiconductor Co., Ltd.Inventors: Mitsuya Ohie, Kyotaro Nakamura, Shuichi Hashidate
-
Publication number: 20100146309Abstract: A semiconductor device includes first, second and third power supply terminals respectively supplied with first, second and third power supply voltages. The semiconductor device also includes a first terminal connectable to a host device and a second terminal connectable to a peripheral device. The semiconductor device also includes a first circuit block connected to the first terminal and the first power supply terminal and receiving data output from the host device based on the first power supply voltage, a second circuit block connected to the second terminal and the third power supply terminal and receiving data output from the peripheral device based on the third power supply voltage, and a third circuit block connected to the second power supply terminal and controlling operation of the first circuit block and the second circuit block based on the second power supply voltage.Type: ApplicationFiled: December 30, 2009Publication date: June 10, 2010Applicant: OKI SEMICONDUCTOR CO., LTD.Inventors: Mitsuya Ohie, Kyotaro Nakamura, Shuichi Hashidate
-
Patent number: 7664969Abstract: A semiconductor device includes first, second and third power supply terminals respectively supplied with first, second and third power supply voltages. The semiconductor device also includes a first terminal connectable to a host device and a second terminal connectable to a peripheral device. The semiconductor device also includes a first circuit block connected to the first terminal and the first power supply terminal and receiving data output from the host device based on the first power supply voltage, a second circuit block connected to the second terminal and the third power supply terminal and receiving data output from the peripheral device based on the third power supply voltage, and a third circuit block connected to the second power supply terminal and controlling operation of the first circuit block and the second circuit block based on the second power supply voltage.Type: GrantFiled: September 22, 2005Date of Patent: February 16, 2010Assignee: Oki Semiconductor Co., Ltd.Inventors: Mitsuya Ohie, Kyotaro Nakamura, Shuichi Hashidate
-
Publication number: 20080276114Abstract: A micro-controller includes a USB control unit, an MC unit having an operation mode and a stop mode and an oscillating circuit, which is commonly used by the USB control unit and the MC unit. The USB control unit includes a watching circuit for watching a condition of a first data and a second data, which is complement data of the first data. The operation of the oscillating circuit is controlled in response to an operation control signal, which is generated by a watching result, and an oscillation control signal whose voltage level is changed in response to the mode of the MC unit.Type: ApplicationFiled: June 24, 2008Publication date: November 6, 2008Inventors: Mitsuya Ohie, Kyotaro Nakamura, Shuichi Hashidate
-
Patent number: 7409573Abstract: A micro-controller includes a USB control unit, an MC unit having an operation mode and a stop mode and an oscillating circuit, which is commonly used by the USB control unit and the MC unit. The USB control unit includes a watching circuit for watching a condition of a first data and a second data, which is complement data of the first data. The operation of the oscillating circuit is controlled in response to an operation control signal, which is generated by a watching result, and an oscillation control signal whose voltage level is changed in response to the mode of the MC unit.Type: GrantFiled: June 17, 2005Date of Patent: August 5, 2008Assignee: Oki Electric Industry Co., Ltd.Inventors: Mitsuya Ohie, Kyotaro Nakamura, Shuichi Hashidate
-
Patent number: 7389437Abstract: A semiconductor circuit includes an integrated circuit having a backup area that is constantly powered and a power-off area that is powered off in a standby mode. A register in the power-off area stores a mask signal that is normally set to the high level but is changed to the low level before a transition to the standby mode. A latch circuit in the backup area latches the low level but not the high level of the mask signal. A masking circuit in the backup area masks input signals from the power-off area to the backup area while the latch circuit is in the latched state. Besides preventing erratic input to the backup area during normal-to-standby transitions, this arrangement prevents leakage of current from the backup area to the power-off area on the mask signal line in the standby mode.Type: GrantFiled: May 20, 2005Date of Patent: June 17, 2008Assignee: Oki Electric Industry Co., Ltd.Inventor: Shuichi Hashidate
-
Patent number: 7263120Abstract: A semiconductor device capable of reducing power consumption. In the semiconductor device having a plurality of data transmitter-receiver circuits using clock signals on frequencies prescribed in the unified standard as transmit/receive clock signals, an oscillator circuit and a clock generator circuit are provided for each data transmitter-receiver circuit and a supply of clock signals to the data transmitter-receiver circuits can be stopped by shutting off the power supply to the oscillator circuits and the clock generator circuits inside the plurality of data transmitter-receiver circuits individually with respect to each data transmitter-receiver circuit.Type: GrantFiled: March 21, 2003Date of Patent: August 28, 2007Assignee: Oki Electric Industry Co., Ltd.Inventor: Shuichi Hashidate
-
Publication number: 20070192831Abstract: In one step of a program, an arbitrary value is written to an authentication code generation module. In the subsequent step, an authentication code is read from the authentication code generation module and it is determined whether the authentication code matches the value written in the preceding step. Normal processing is performed if the program is executed by a regular microcontroller that has an authentication code generation module. If the program is executed by another microcontroller that does not have the authentication code generation module, the authentication code cannot be read and, therefore, continuation of the processing becomes impossible. Accordingly, illegal use of a copied program can be prevented.Type: ApplicationFiled: January 18, 2007Publication date: August 16, 2007Inventor: Shuichi Hashidate
-
Publication number: 20060053314Abstract: A semiconductor circuit includes an integrated circuit having a backup area that is constantly powered and a power-off area that is powered off in a standby mode. A register in the power-off area stores a mask signal that is normally set to the high level but is changed to the low level before a transition to the standby mode. A latch circuit in the backup area latches the low level but not the high level of the mask signal. A masking circuit in the backup area masks input signals from the power-off area to the backup area while the latch circuit is in the latched state. Besides preventing erratic input to the backup area during normal-to-standby transitions, this arrangement prevents leakage of current from the backup area to the power-off area on the mask signal line in the standby mode.Type: ApplicationFiled: May 20, 2005Publication date: March 9, 2006Applicant: Oki Electric Industry Co., Ltd.Inventor: Shuichi Hashidate
-
Publication number: 20060015760Abstract: A semiconductor device that includes a first power supply terminal supplied with a first power supply voltage, a second power supply terminal supplied with a second power supply voltage, and a third power supply terminal supplied with a third power supply voltage. The semiconductor device also includes a first terminal being connectable to a host device and a second terminal being connectable to a peripheral device.Type: ApplicationFiled: September 22, 2005Publication date: January 19, 2006Inventors: Mitsuya Ohie, Kyotaro Nakamura, Shuichi Hashidate
-
Patent number: 6971032Abstract: A semiconductor device includes first through third power supply terminals respectively supplied with first, second and third power supply voltages. The semiconductor device also includes a first terminal connectable to a host device, and a second terminal connectable to a peripheral device. A first circuit block is connected to the first terminal and the first power supply terminal, and receives data output from the host device based on the first power supply voltage. A second circuit block is connected to the second terminal and the third power supply terminal, and receives data output from the peripheral device based on the third power supply voltage. A third circuit block is connected to the second power supply terminal, and controls operation of the first circuit block and the second circuit block based on the second power supply voltage.Type: GrantFiled: September 6, 2001Date of Patent: November 29, 2005Assignee: Oki Electric Industry Co., Ltd.Inventors: Mitsuya Ohie, Kyotaro Nakamura, Shuichi Hashidate
-
Publication number: 20050235172Abstract: A micro-controller includes a USB control unit, an MC unit having an operation mode and a stop mode and an oscillating circuit, which is commonly used by the USB control unit and the MC unit. The USB control unit includes a watching circuit for watching a condition of a first data and a second data, which is complement data of the first data. The operation of the oscillating circuit is controlled in response to an operation control signal, which is generated by a watching result, and an oscillation control signal whose voltage level is changed in response to the mode of the MC unit.Type: ApplicationFiled: June 17, 2005Publication date: October 20, 2005Inventors: Mitsuya Ohie, Kyotaro Nakamura, Shuichi Hashidate
-
Patent number: 6938108Abstract: A micro-controller includes a USB control unit, an MC unit having an operation mode and a stop mode and an oscillating circuit, which is commonly used by the USB control unit and the MC unit. The USB control unit includes a watching circuit for watching a condition of a first data and a second data, which is complement data of the first data. The operation of the oscillating circuit is controlled in response to an operation control signal, which is generated by a watching result, and an oscillation control signal whose voltage level is changed in response to the mode of the MC unit.Type: GrantFiled: September 27, 2001Date of Patent: August 30, 2005Assignee: Oki Electric Industry Co., Ltd.Inventors: Mitsuya Ohie, Kyotaro Nakamura, Shuichi Hashidate
-
Publication number: 20040043734Abstract: A semiconductor device capable of reducing power consumption. In the semiconductor device having a plurality of data transmitter-receiver circuits using clock signals on frequencies prescribed in the unified standard as transmit/receive clock signals, an oscillator circuit and a clock generator circuit are provided for each data transmitter-receiver circuit and a supply of clock signals to the data transmitter-receiver circuits can be stopped by shutting off the power supply to the oscillator circuits and the clock generator circuits inside the plurality of data transmitter-receiver circuits individually with respect to each data transmitter-receiver circuit.Type: ApplicationFiled: March 21, 2003Publication date: March 4, 2004Inventor: Shuichi Hashidate
-
Patent number: 6441665Abstract: A semiconductor integrated circuit is provided that achieves a lesser degree of inconsistency in the delay time of clock signals that are internally provided. An input clock signal distributed via an input clock supply path is provided to individual timing adjustments circuits. The timing adjustment circuits are each constituted by providing a wiring pattern having serial resistors and gaps in a circuit correction area. The wiring pattern of the semiconductor integrated circuit is corrected by employing a focused ion beam apparatus to achieve an adjustment so that internal input clock signals at the same phase are obtained from the individual timing adjustment circuits. Using the wiring pattern having undergone the adjustment, a semiconductor integrated circuit is manufactured as a product.Type: GrantFiled: June 12, 2000Date of Patent: August 27, 2002Assignee: Oki Electric Industry Co., Ltd.Inventors: Shuichi Hashidate, Shinichi Fukuzako, Tetsuya Tanabe
-
Publication number: 20020039319Abstract: A semiconductor device that includes a first power supply terminal supplied with a first power supply voltage, a second power supply terminal supplied with a second power supply voltage, and a third power supply terminal supplied with a third power supply voltage. The semiconductor device also includes a first terminal being connectable to a host device and a second terminal being connectable to a peripheral device.Type: ApplicationFiled: September 6, 2001Publication date: April 4, 2002Inventors: Mitsuya Ohie, Kyotaro Nakamura, Shuichi Hashidate