Abstract: It is desirable to reduce chip area, lower on resistance and improve electric current driving capacity of a DMOS transistor in a semiconductor device with a DMOS transistor. On the surface of an N type epitaxial layer, a P+W layer of the opposite conductivity type (P type) is disposed and a DMOS transistor is formed in the P+W layer. The epitaxial layer and a drain region are insulated by the P+W layer. Therefore, it is possible to form both the DMOS transistor and other device element in a single confined region surrounded by an isolation layer. An N type FN layer is disposed on the surface region of the P+W layer beneath the gate electrode. An N+D layer, which is adjacent to the edge of the gate electrode of the drain layer side, is also formed. P type impurity layers (a P+D layer and a FP layer), which are located below the drain layer, are disposed beneath the contact region of the drain layer.

Abstract: There is a problem that a reverse off-leak current becomes too large in a Schottky barrier diode. A semiconductor device of the present invention includes P-type first and second anode diffusion layers formed in an N-type epitaxial layer, N-type cathode diffusion layers formed in the epitaxial layer, a P-type third anode diffusion layer formed in the epitaxial layer so as to surround the first and second anode diffusion layers and to extend toward the cathode diffusion layers, and a Schottky barrier metal layer formed on the first and second anode diffusion layers.

Abstract: A wireless communication system may include a first coil having at least a function of transmitting signal information, a relay coil, and a second coil having at least a function of receiving the signal information, and satisfying Equation (1): RO1>RO2>RO3, where RO1 represents an outer diameter of the first coil, RO2 represents an outer diameter of the relay coil, and RO3 represents an outer diameter of the second coil, and a small portable device, a housing case for a small portable device, and a communication device for a small portable device to be used in the wireless communication system.

Abstract: The invention provides a DMOS transistor in which a leakage current is decreased and the source-drain breakdown voltage of the transistor in the off state is enhanced when a body layer is formed by oblique ion implantation. After a photoresist layer 18 is formed, using the photoresist layer 18 and a gate electrode 14 as a mask, first ion implantation is performed toward a first corner portion 14C1 on the inside of the gate electrode 14 in a first direction shown by an arrow A?. A first body layer 17A? is formed by this first ion implantation. The first body layer 17A? is formed so as to extend from the first corner portion 14C1 to under the gate electrode 14, and the P-type impurity concentration of the body layer 17A? in the first corner portion 14C1 is higher than that of a conventional transistor.

Abstract: In the winding wire at the winding completion end side, two wires are piled up vertically and wound together from the inner circumferential side towards the outer circumferential side. The winding wire at the winding start end side that has remained on the inner circumferential side is drawn forth from the inner circumferential side to the outer circumferential side so as to form a curve along the flat surface of the coil. In the crossing portions of the winding wire at the winding completion end side and the winding wire at the winding start end side, the two wires of each winding wire are superimposed and caused to cross each other in a state in which the wires are laid down transversely.

Abstract: A coil is formed by coaxially winding a second winding so as to be in intimate contact with an outer circumferential portion of a first winding wound about a winding shaft axis. In the first winding, one side of a winding wire is wound from an inner circumferential side to an outer circumferential side, the other side of the winding wire is drawn forth from the inner circumferential side to the outer circumferential side, while crossing the one side of the winding wire, and a thickness in a direction of the winding shaft axis in crossing portions of the one side of the winding wire and the other side of the winding wire is equal to a thickness in other portions.

Abstract: A coil is formed by coaxially winding a second winding so as to be in intimate contact with an outer circumferential portion of a first winding wound about a winding shaft axis. In the first winding, one side of a winding wire is wound from an inner circumferential side to an outer circumferential side, the other side of the winding wire is drawn forth from the inner circumferential side to the outer circumferential side, while crossing the one side of the winding wire, and a thickness in a direction of the winding shaft axis in crossing portions of the one side of the winding wire and the other side of the winding wire is equal to a thickness in other portions.

Abstract: The invention provides a high voltage MOS transistor having a high source/drain breakdown voltage of about 300V and a low on-resistance. An N-type body layer is formed extending from a source layer side to under a gate electrode. A P-type second drift layer is formed in an epitaxial semiconductor layer by being diffused deeper than a first drift layer, extending from under the first drift layer to under the gate electrode and forming a PN junction with the body layer under the gate electrode. A surface of the body layer between this second drift layer and the source layer serves as a channel region. The first drift layer is formed at a distance from a left end of the gate electrode where electric field concentration easily occurs.

Abstract: A bearing unit is provided which includes a shaft (51) to support rotatably, radial bearing (55) to support the shaft (51) circumferentially, a thrust bearing (66) to support the shaft (51) in the direction of thrusting, and a housing (56) having the radial bearing (55) and thrust bearing (66) disposed therein and in which a viscous fluid (57) is filled. The housing (56) has a sealed structure except for a shaft insertion hole (65) formed therein and through which the shaft 51 is introduced. Between the outer surface of the shaft (51) and the inner surface of the shaft insertion hole (65), there is defined a gap (69) having a sufficient width to prevent the viscous fluid (57) filled in the housing (56) from leaking out of the latter.

Abstract: In the winding wire at the winding completion end side, two wires are piled up vertically and wound together from the inner circumferential side towards the outer circumferential side. The winding wire at the winding start end side that has remained on the inner circumferential side is drawn forth from the inner circumferential side to the outer circumferential side so as to form a curve along the flat surface of the coil. In the crossing portions of the winding wire at the winding completion end side and the winding wire at the winding start end side, the two wires of each winding wire are superimposed and caused to cross each other in a state in which the wires are laid down transversely.

Abstract: The invention provides a DMOS transistor in which a leakage current is decreased and the source-drain breakdown voltage of the transistor in the off state is enhanced when a body layer is formed by oblique ion implantation. After a photoresist layer 18 is formed, using the photoresist layer 18 and a gate electrode 14 as a mask, first ion implantation is performed toward a first corner portion 14C1 on the inside of the gate electrode 14 in a first direction shown by an arrow A?. A first body layer 17A? is formed by this first ion implantation. The first body layer 17A? is formed so as to extend from the first corner portion 14C1 to under the gate electrode 14, and the P-type impurity concentration of the body layer 17A? in the first corner portion 14C1 is higher than that of a conventional transistor.

Abstract: This invention provides a DMOS transistor that has a reduced ON resistance and is prevented from deterioration in strength against an electrostatic discharge. An edge portion of a source layer of the DMOS transistor is disposed so as to recede from an inner corner portion of a gate electrode. A silicide layer is structured so as not to extend out of the edge portion of the source layer. That is, although the silicide layer is formed on a surface of the source layer, the silicide layer is not formed on a surface of a portion of a body layer, which is exposed between the source layer and the inner corner portion of the gate electrode. As a result, the strength against the electrostatic discharge can be improved, because an electric current flows almost uniformly through whole of the DMOS transistor without converging.

Abstract: In a semiconductor device of the present invention, a protection diode for protecting a device is formed on an epitaxial layer formed on a substrate. A Schottky barrier metal layer is formed on a surface of the epitaxial layer and a P-type diffusion layer is formed at a lower portion of an end portion of the Schottky barrier metal layer. Then, a P-type diffusion layer is formed to be connected to a P-type diffusion layer and is extended to a cathode region. A metal layer to which an anode electrode is applied is formed above the P-type diffusion layer, thereby making it possible to obtain a field plate effect. This structure reduces a large change in a curvature of a depletion layer, thereby improving a withstand voltage characteristic of the protection diode.

Abstract: The invention provides a high voltage MOS transistor having a high gate breakdown voltage and a high source/drain breakdown voltage and having a low on-resistance. A gate electrode is formed on an epitaxial silicon layer with a LOCOS film being interposed therebetween. A P-type first drift layer is formed on the left side of the LOCOS film, and a P+-type source layer is disposed on the surface of the epitaxial silicon layer on the right side of the LOCOS film, being opposed to the first drift layer over the gate electrode. A P-type second drift layer is formed by being diffused in the epitaxial silicon layer deeper than the first drift layer, extending from under the first drift layer to under the left side of the LOCOS film. A recess is formed in a bottom portion of the second drift layer under the left end of the LOCOS film.

Abstract: In a semiconductor device of the present invention, a MOS transistor is disposed in an elliptical shape. Linear regions in the elliptical shape are respectively used as the active regions, and round regions in the elliptical shape is used respectively as the inactive regions. In each of the inactive regions, a P type diffusion layer is formed to coincide with a round shape. Another P type diffusion layer is formed in a part of one of the inactive regions. These P type diffusion layers are formed as floating diffusion layers, are capacitively coupled to a metal layer on an insulating layer, and assume a state where predetermined potentials are respectively applied thereto. This structure makes it possible to maintain current performance of the active regions, while improving the withstand voltage characteristics in the inactive regions.

Abstract: This invention is directed to offer a MOS transistor that has a high source-drain breakdown BVds, a low on resistance and a high electric current driving capacity. On resistance is lowered by forming an N well layer for lowering on resistance in the drift region. The N well layer is disposed beneath the gate electrode and away from the N well layer with a certain space between them. This space ensures the withstand voltage at the edge of the gate electrode of the drain layer side. Also, the N well layer is formed on the surface of an epitaxial layer in the region that includes a P+L layer. The edge of the N well layer of the drain layer side is located near the edge of the P+L layer of the drain layer side and away from the N well layer. This space makes the expansion of depletion layer from the P+L layer easier, further improving the withstand voltage.

Abstract: Disclosed is that in a method of manufacturing a semiconductor device of the present invention, when first and second P type diffusion layers using as a backgate region, these layers are formed in such a way that their impurity concentration peaks are shifted, respectively. Then, in the backgate region, a concentration profile of a region where an N type diffusion layer is formed is gradually established. After that, impurity ions, which form the N type diffusion layer, are implanted, and thereafter a thermal treatment is performed to diffuse the N type diffusion layer in a y shape at a lower portion of a gate electrode. This manufacturing method makes it possible to implement an electric filed relaxation in a drain region.

Abstract: This invention provides a DMOS transistor that has a reduced ON resistance and is prevented from deterioration in strength against an electrostatic discharge. An edge portion of a source layer of the DMOS transistor is disposed so as to recede from an inner corner portion of a gate electrode. A silicide layer is structured so as not to extend out of the edge portion of the source layer. That is, although the silicide layer is formed on a surface of the source layer, the silicide layer is not formed on a surface of a portion of a body layer, which is exposed between the source layer and the inner corner portion of the gate electrode. As a result, the strength against the electrostatic discharge can be improved, because an electric current flows almost uniformly through whole of the DMOS transistor without converging.

Abstract: In a semiconductor device of the present invention, a thin gate oxide film is formed on a P-type diffusion layer. On the gate oxide film, a gate electrode is formed. N-type diffusion layers are formed in the P-type diffusion layer, and the N-type diffusion layer is used as a drain region. The N-type diffusion layer is diffused in a ? shape at least below the gate electrode. With the structure described above, a diffusion region of the N-type diffusion layer expands and comes to be a low-concentration region in the vicinity of a surface of an epitaxial layer. Thus, it is possible to reduce an electric field from the gate electrode and an electric field between a source and a drain.

Abstract: The present invention is related to a disc cartridge in which an optical disc, an inner shell and shutter members are housed in a main cartridge body unit, formed by abutting and combining upper and lower shells and in which the inner shell is run in rotation to cause the shutter members to open or close an aperture provided in the main cartridge body unit. The inner shell is formed by a resin molding portion comprised of a first molded portion for forming the inner shell and a second molded portion connected to the first molded portion. The second molded portion is provided at a position forming the aperture in the inner shell and is connected to the first molded portion through a flanged thin-walled section. The inner shell is formed by severing the second molded portion and the flanged thin-walled section.