Patents by Inventor Shuichi Nishida

Shuichi Nishida has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20100289076
    Abstract: A technique is presented for further reducing on-resistance (or on-voltage) in a vertical semiconductor device provided with a carrier shielding layer. A semiconductor substrate 20 of a semiconductor device 10 comprises a channel section 10A and a non-channel section 10B. An emitter region 26 is formed in the channel section 10A, this emitter region 26 making contact with a side surface of a trench gate 30 and being electrically connected to an emitter electrode 28. The emitter region 26 is not formed in a body region 25 of the non-channel section 10B. In a plan view, an occupied area ratio of the area which a carrier shielding layer 52 located in the non-channel section 10B occupies within the non-channel section 10B is larger than an occupied area ratio of the area which the carrier shielding layer 52 located in the channel section 10A occupies within the channel section 10A.
    Type: Application
    Filed: November 11, 2008
    Publication date: November 18, 2010
    Inventors: Shuichi Nishida, Toyokazu Ohnishi, Tomoyuki Shoji
  • Patent number: 7169468
    Abstract: A resin bonded rare earth magnet, compression molded from rare earth-transition alloy powder and thermosetting resin, having a magnet 1 comprising a mixture of thermosetting resin and rare earth-transition alloy powder with a particle size of between 20 and 300 microns, a filling material 3 with particle size between 0.1 and 15 microns which is used to fill in the depressions 2 on the surface of said magnet 1 and is then fixed with said thermosetting resin, and a corrosion inhibiting coat 4 made from synthetic resin applied to the surface of said magnet 1 which has been rendered smooth by the application of said filling material into the depressions on its surface.
    Type: Grant
    Filed: October 18, 1999
    Date of Patent: January 30, 2007
    Assignee: Minebea Co., Ltd
    Inventors: Toshihiko Miura, Masahito Kawasaki, Shunji Suzuki, Shuichi Nishida
  • Publication number: 20060056883
    Abstract: An image forming apparatus has an image forming carrier, an image forming portion that forms an image on the image forming carrier, an intermediate transfer medium to which the image on the image forming carrier is primarily transferred, and a transfer portion that secondarily transfers to a recording medium the image primarily transferred to the intermediate transfer medium. An area where the image forming carrier and the intermediate transfer medium are opposed includes a primary transfer area where the image on the image forming carrier is transferred to the intermediate transfer medium and a secondary transfer area where the image on the intermediate transfer medium is transferred to the recording medium.
    Type: Application
    Filed: September 13, 2004
    Publication date: March 16, 2006
    Inventors: Koichi Watanabe, Shinichi Kuramoto, Mitsuo Yamamoto, Shuichi Nishida, Wataru Suzuki, Masahiro Sato, Atsuyuki Kitamura
  • Publication number: 20030012948
    Abstract: A resin bonded rare earth magnet, compression molded from rare earth-transition alloy powder and thermosetting resin, having a magnet body 1 comprising a mixture of thermosetting resin and rare earth-transition alloy powder with a particle size of between 20 and 300 microns, a filling material 3 with particle size between 0.1 and 15 microns which is used to fill in the depressions 2 on the surface of said magnet 1 and is then fixed with said thermosetting resin, and a corrosion inhibiting coat 4 made from synthetic resin applied to the surface of said magnet 1 which has been rendered smooth by the application of said filling material into the depressions on its surface.
    Type: Application
    Filed: October 18, 1999
    Publication date: January 16, 2003
    Inventors: TOSHIHIKO MIURA, MASAHITO KAWASAKI, SHUNJI SUZUKI, SHUICHI NISHIDA
  • Patent number: 5986752
    Abstract: The attempt is to improve the light utilization effect by concentrating and irradiating the light on the observation area, and at the same time, to be able to simply wipe the end clean even when dirtied by oil. Optical fiber light guide 7 for illumination is arranged concentrically on the peripheral part of image incident end part 6 in of image guide 6 that has been inserted inside of pipe 2; that light exit end part 7 out is arranged closer to objective lens 3 than the focal point position of objective lens 3.
    Type: Grant
    Filed: September 19, 1997
    Date of Patent: November 16, 1999
    Assignee: Moritex Corporation
    Inventors: Yuhkoh Morito, Shuichi Nishida
  • Patent number: 5236867
    Abstract: A semiconductor device includes first and second oxide film regions formed on a surface of a semiconductor substrate. A first impurity diffusion region is located at a distance from one of the first and second oxide regions. A second impurity diffusion region is located along the surface of the semiconductor substrate and partially overlaps the first impurity diffusion region. The width of the second impurity diffusion region is greater than that of the first impurity diffusion region. A contact hole is provided extending substantially over the second impurity diffusion region. The contact hole has a first side wall defined by one of the first and second oxide film regions and a second side wall defined by an insulating film. The width of the opening of the contact hole is greater than or equal to the width of the first impurity diffusion region. A conductive film is formed along the bottom portion and along the opposite side walls of the contact hole.
    Type: Grant
    Filed: January 17, 1992
    Date of Patent: August 17, 1993
    Assignee: Matsushita Electronics Corporation
    Inventors: Takashi Furuta, Shuichi Nishida
  • Patent number: 5113234
    Abstract: A semiconductor device includes first and second oxide film regions formed on a surface of a semiconductor substrate. A first impurity diffusion region is located at a distance from one of the first and second oxide regions. A second impurity diffusion region is located along the surface of the semiconductor substrate and partially overlaps the first impurity diffusion region. The width of the second impurity diffusion region is greater than that of the first impurity diffusion region. A contact hole is provided extending substantially over the second impurity diffusion region. The contact hole has a first side wall defined by one of the first and second oxide film regions and a second side wall defined by an insulating film. The width of the opening of the contact hole is greater than or equal to the width of the first impurity diffusion region. A conductive film is formed along the bottom portion and along the opposite side walls of the contact hole.
    Type: Grant
    Filed: February 11, 1991
    Date of Patent: May 12, 1992
    Assignee: Matsushita Electronics Corporation
    Inventors: Takashi Furuta, Shuichi Nishida